1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2012 3*4882a593Smuzhiyun * Texas Instruments, <www.ti.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef _ASM_ARCH_SPL_H_ 8*4882a593Smuzhiyun #define _ASM_ARCH_SPL_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define BOOT_DEVICE_NONE 0x00 11*4882a593Smuzhiyun #define BOOT_DEVICE_MMC2_2 0xFF 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #if defined(CONFIG_TI814X) 14*4882a593Smuzhiyun #define BOOT_DEVICE_XIP 0x01 15*4882a593Smuzhiyun #define BOOT_DEVICE_XIPWAIT 0x02 16*4882a593Smuzhiyun #define BOOT_DEVICE_NAND 0x05 17*4882a593Smuzhiyun #define BOOT_DEVICE_NAND_I2C 0x06 18*4882a593Smuzhiyun #define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */ 19*4882a593Smuzhiyun #define BOOT_DEVICE_MMC1 0x09 20*4882a593Smuzhiyun #define BOOT_DEVICE_SPI 0x15 21*4882a593Smuzhiyun #define BOOT_DEVICE_UART 0x41 22*4882a593Smuzhiyun #define BOOT_DEVICE_USBETH 0x44 23*4882a593Smuzhiyun #define BOOT_DEVICE_CPGMAC 0x46 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 26*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 27*4882a593Smuzhiyun #elif defined(CONFIG_TI816X) 28*4882a593Smuzhiyun #define BOOT_DEVICE_XIP 0x01 29*4882a593Smuzhiyun #define BOOT_DEVICE_XIPWAIT 0x02 30*4882a593Smuzhiyun #define BOOT_DEVICE_NAND 0x03 31*4882a593Smuzhiyun #define BOOT_DEVICE_ONENAND 0x04 32*4882a593Smuzhiyun #define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */ 33*4882a593Smuzhiyun #define BOOT_DEVICE_MMC1 0x06 34*4882a593Smuzhiyun #define BOOT_DEVICE_UART 0x43 35*4882a593Smuzhiyun #define BOOT_DEVICE_USB 0x45 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 38*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 39*4882a593Smuzhiyun #elif defined(CONFIG_AM33XX) 40*4882a593Smuzhiyun #define BOOT_DEVICE_XIP 0x01 41*4882a593Smuzhiyun #define BOOT_DEVICE_XIPWAIT 0x02 42*4882a593Smuzhiyun #define BOOT_DEVICE_NAND 0x05 43*4882a593Smuzhiyun #define BOOT_DEVICE_NAND_I2C 0x06 44*4882a593Smuzhiyun #define BOOT_DEVICE_MMC1 0x08 45*4882a593Smuzhiyun #define BOOT_DEVICE_MMC2 0x09 46*4882a593Smuzhiyun #define BOOT_DEVICE_SPI 0x0B 47*4882a593Smuzhiyun #define BOOT_DEVICE_UART 0x41 48*4882a593Smuzhiyun #define BOOT_DEVICE_USBETH 0x44 49*4882a593Smuzhiyun #define BOOT_DEVICE_CPGMAC 0x46 50*4882a593Smuzhiyun #define BOOT_DEVICE_ONENAND 0xFF /* ROM does not support OneNAND. */ 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 53*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 54*4882a593Smuzhiyun #elif defined(CONFIG_AM43XX) 55*4882a593Smuzhiyun #define BOOT_DEVICE_NOR 0x01 56*4882a593Smuzhiyun #define BOOT_DEVICE_NAND 0x05 57*4882a593Smuzhiyun #define BOOT_DEVICE_MMC1 0x07 58*4882a593Smuzhiyun #define BOOT_DEVICE_MMC2 0x08 59*4882a593Smuzhiyun #define BOOT_DEVICE_SPI 0x0A 60*4882a593Smuzhiyun #define BOOT_DEVICE_USB 0x0D 61*4882a593Smuzhiyun #define BOOT_DEVICE_UART 0x41 62*4882a593Smuzhiyun #define BOOT_DEVICE_USBETH 0x45 63*4882a593Smuzhiyun #define BOOT_DEVICE_CPGMAC 0x47 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 66*4882a593Smuzhiyun #ifdef CONFIG_SPL_USB_SUPPORT 67*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB 68*4882a593Smuzhiyun #else 69*4882a593Smuzhiyun #define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 70*4882a593Smuzhiyun #endif 71*4882a593Smuzhiyun #endif 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #endif 74