1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * mux_am43xx.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _MUX_AM43XX_H_ 10*4882a593Smuzhiyun #define _MUX_AM43XX_H_ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <common.h> 13*4882a593Smuzhiyun #include <asm/io.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define MUX_CFG(value, offset) \ 16*4882a593Smuzhiyun __raw_writel(value, (CTRL_BASE + offset)); 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* PAD Control Fields */ 19*4882a593Smuzhiyun #define SLEWCTRL (0x1 << 19) 20*4882a593Smuzhiyun #define RXACTIVE (0x1 << 18) 21*4882a593Smuzhiyun #define PULLDOWN_EN (0x0 << 17) /* Pull Down Selection */ 22*4882a593Smuzhiyun #define PULLUP_EN (0x1 << 17) /* Pull Up Selection */ 23*4882a593Smuzhiyun #define PULLUDEN (0x0 << 16) /* Pull up/down enable */ 24*4882a593Smuzhiyun #define PULLUDDIS (0x1 << 16) /* Pull up/down disable */ 25*4882a593Smuzhiyun #define MODE(val) val /* used for Readability */ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* 28*4882a593Smuzhiyun * PAD CONTROL OFFSETS 29*4882a593Smuzhiyun * Field names corresponds to the pad signal name 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun struct pad_signals { 32*4882a593Smuzhiyun int gpmc_ad0; 33*4882a593Smuzhiyun int gpmc_ad1; 34*4882a593Smuzhiyun int gpmc_ad2; 35*4882a593Smuzhiyun int gpmc_ad3; 36*4882a593Smuzhiyun int gpmc_ad4; 37*4882a593Smuzhiyun int gpmc_ad5; 38*4882a593Smuzhiyun int gpmc_ad6; 39*4882a593Smuzhiyun int gpmc_ad7; 40*4882a593Smuzhiyun int gpmc_ad8; 41*4882a593Smuzhiyun int gpmc_ad9; 42*4882a593Smuzhiyun int gpmc_ad10; 43*4882a593Smuzhiyun int gpmc_ad11; 44*4882a593Smuzhiyun int gpmc_ad12; 45*4882a593Smuzhiyun int gpmc_ad13; 46*4882a593Smuzhiyun int gpmc_ad14; 47*4882a593Smuzhiyun int gpmc_ad15; 48*4882a593Smuzhiyun int gpmc_a0; 49*4882a593Smuzhiyun int gpmc_a1; 50*4882a593Smuzhiyun int gpmc_a2; 51*4882a593Smuzhiyun int gpmc_a3; 52*4882a593Smuzhiyun int gpmc_a4; 53*4882a593Smuzhiyun int gpmc_a5; 54*4882a593Smuzhiyun int gpmc_a6; 55*4882a593Smuzhiyun int gpmc_a7; 56*4882a593Smuzhiyun int gpmc_a8; 57*4882a593Smuzhiyun int gpmc_a9; 58*4882a593Smuzhiyun int gpmc_a10; 59*4882a593Smuzhiyun int gpmc_a11; 60*4882a593Smuzhiyun int gpmc_wait0; 61*4882a593Smuzhiyun int gpmc_wpn; 62*4882a593Smuzhiyun int gpmc_be1n; 63*4882a593Smuzhiyun int gpmc_csn0; 64*4882a593Smuzhiyun int gpmc_csn1; 65*4882a593Smuzhiyun int gpmc_csn2; 66*4882a593Smuzhiyun int gpmc_csn3; 67*4882a593Smuzhiyun int gpmc_clk; 68*4882a593Smuzhiyun int gpmc_advn_ale; 69*4882a593Smuzhiyun int gpmc_oen_ren; 70*4882a593Smuzhiyun int gpmc_wen; 71*4882a593Smuzhiyun int gpmc_be0n_cle; 72*4882a593Smuzhiyun int lcd_data0; 73*4882a593Smuzhiyun int lcd_data1; 74*4882a593Smuzhiyun int lcd_data2; 75*4882a593Smuzhiyun int lcd_data3; 76*4882a593Smuzhiyun int lcd_data4; 77*4882a593Smuzhiyun int lcd_data5; 78*4882a593Smuzhiyun int lcd_data6; 79*4882a593Smuzhiyun int lcd_data7; 80*4882a593Smuzhiyun int lcd_data8; 81*4882a593Smuzhiyun int lcd_data9; 82*4882a593Smuzhiyun int lcd_data10; 83*4882a593Smuzhiyun int lcd_data11; 84*4882a593Smuzhiyun int lcd_data12; 85*4882a593Smuzhiyun int lcd_data13; 86*4882a593Smuzhiyun int lcd_data14; 87*4882a593Smuzhiyun int lcd_data15; 88*4882a593Smuzhiyun int lcd_vsync; 89*4882a593Smuzhiyun int lcd_hsync; 90*4882a593Smuzhiyun int lcd_pclk; 91*4882a593Smuzhiyun int lcd_ac_bias_en; 92*4882a593Smuzhiyun int mmc0_dat3; 93*4882a593Smuzhiyun int mmc0_dat2; 94*4882a593Smuzhiyun int mmc0_dat1; 95*4882a593Smuzhiyun int mmc0_dat0; 96*4882a593Smuzhiyun int mmc0_clk; 97*4882a593Smuzhiyun int mmc0_cmd; 98*4882a593Smuzhiyun int mii1_col; 99*4882a593Smuzhiyun int mii1_crs; 100*4882a593Smuzhiyun int mii1_rxerr; 101*4882a593Smuzhiyun int mii1_txen; 102*4882a593Smuzhiyun int mii1_rxdv; 103*4882a593Smuzhiyun int mii1_txd3; 104*4882a593Smuzhiyun int mii1_txd2; 105*4882a593Smuzhiyun int mii1_txd1; 106*4882a593Smuzhiyun int mii1_txd0; 107*4882a593Smuzhiyun int mii1_txclk; 108*4882a593Smuzhiyun int mii1_rxclk; 109*4882a593Smuzhiyun int mii1_rxd3; 110*4882a593Smuzhiyun int mii1_rxd2; 111*4882a593Smuzhiyun int mii1_rxd1; 112*4882a593Smuzhiyun int mii1_rxd0; 113*4882a593Smuzhiyun int rmii1_refclk; 114*4882a593Smuzhiyun int mdio_data; 115*4882a593Smuzhiyun int mdio_clk; 116*4882a593Smuzhiyun int spi0_sclk; 117*4882a593Smuzhiyun int spi0_d0; 118*4882a593Smuzhiyun int spi0_d1; 119*4882a593Smuzhiyun int spi0_cs0; 120*4882a593Smuzhiyun int spi0_cs1; 121*4882a593Smuzhiyun int ecap0_in_pwm0_out; 122*4882a593Smuzhiyun int uart0_ctsn; 123*4882a593Smuzhiyun int uart0_rtsn; 124*4882a593Smuzhiyun int uart0_rxd; 125*4882a593Smuzhiyun int uart0_txd; 126*4882a593Smuzhiyun int uart1_ctsn; 127*4882a593Smuzhiyun int uart1_rtsn; 128*4882a593Smuzhiyun int uart1_rxd; 129*4882a593Smuzhiyun int uart1_txd; 130*4882a593Smuzhiyun int i2c0_sda; 131*4882a593Smuzhiyun int i2c0_scl; 132*4882a593Smuzhiyun int mcasp0_aclkx; 133*4882a593Smuzhiyun int mcasp0_fsx; 134*4882a593Smuzhiyun int mcasp0_axr0; 135*4882a593Smuzhiyun int mcasp0_ahclkr; 136*4882a593Smuzhiyun int mcasp0_aclkr; 137*4882a593Smuzhiyun int mcasp0_fsr; 138*4882a593Smuzhiyun int mcasp0_axr1; 139*4882a593Smuzhiyun int mcasp0_ahclkx; 140*4882a593Smuzhiyun int cam0_hd; 141*4882a593Smuzhiyun int cam0_vd; 142*4882a593Smuzhiyun int cam0_field; 143*4882a593Smuzhiyun int cam0_wen; 144*4882a593Smuzhiyun int cam0_pclk; 145*4882a593Smuzhiyun int cam0_data8; 146*4882a593Smuzhiyun int cam0_data9; 147*4882a593Smuzhiyun int cam1_data9; 148*4882a593Smuzhiyun int cam1_data8; 149*4882a593Smuzhiyun int cam1_hd; 150*4882a593Smuzhiyun int cam1_vd; 151*4882a593Smuzhiyun int cam1_pclk; 152*4882a593Smuzhiyun int cam1_field; 153*4882a593Smuzhiyun int cam1_wen; 154*4882a593Smuzhiyun int cam1_data0; 155*4882a593Smuzhiyun int cam1_data1; 156*4882a593Smuzhiyun int cam1_data2; 157*4882a593Smuzhiyun int cam1_data3; 158*4882a593Smuzhiyun int cam1_data4; 159*4882a593Smuzhiyun int cam1_data5; 160*4882a593Smuzhiyun int cam1_data6; 161*4882a593Smuzhiyun int cam1_data7; 162*4882a593Smuzhiyun int cam0_data0; 163*4882a593Smuzhiyun int cam0_data1; 164*4882a593Smuzhiyun int cam0_data2; 165*4882a593Smuzhiyun int cam0_data3; 166*4882a593Smuzhiyun int cam0_data4; 167*4882a593Smuzhiyun int cam0_data5; 168*4882a593Smuzhiyun int cam0_data6; 169*4882a593Smuzhiyun int cam0_data7; 170*4882a593Smuzhiyun int uart3_rxd; 171*4882a593Smuzhiyun int uart3_txd; 172*4882a593Smuzhiyun int uart3_ctsn; 173*4882a593Smuzhiyun int uart3_rtsn; 174*4882a593Smuzhiyun int gpio5_8; 175*4882a593Smuzhiyun int gpio5_9; 176*4882a593Smuzhiyun int gpio5_10; 177*4882a593Smuzhiyun int gpio5_11; 178*4882a593Smuzhiyun int gpio5_12; 179*4882a593Smuzhiyun int gpio5_13; 180*4882a593Smuzhiyun int spi4_sclk; 181*4882a593Smuzhiyun int spi4_d0; 182*4882a593Smuzhiyun int spi4_d1; 183*4882a593Smuzhiyun int spi4_cs0; 184*4882a593Smuzhiyun int spi2_sclk; 185*4882a593Smuzhiyun int spi2_d0; 186*4882a593Smuzhiyun int spi2_d1; 187*4882a593Smuzhiyun int spi2_cs0; 188*4882a593Smuzhiyun int xdma_evt_intr0; 189*4882a593Smuzhiyun int xdma_evt_intr1; 190*4882a593Smuzhiyun int clkreq; 191*4882a593Smuzhiyun int nresetin_out; 192*4882a593Smuzhiyun int rsvd1; 193*4882a593Smuzhiyun int nnmi; 194*4882a593Smuzhiyun int rsvd2; 195*4882a593Smuzhiyun int rsvd3; 196*4882a593Smuzhiyun int tms; 197*4882a593Smuzhiyun int tdi; 198*4882a593Smuzhiyun int tdo; 199*4882a593Smuzhiyun int tck; 200*4882a593Smuzhiyun int ntrst; 201*4882a593Smuzhiyun int emu0; 202*4882a593Smuzhiyun int emu1; 203*4882a593Smuzhiyun int osc1_in; 204*4882a593Smuzhiyun int osc1_out; 205*4882a593Smuzhiyun int rtc_porz; 206*4882a593Smuzhiyun int ext_wakeup0; 207*4882a593Smuzhiyun int pmic_power_en0; 208*4882a593Smuzhiyun int usb0_drvvbus; 209*4882a593Smuzhiyun int usb1_drvvbus; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun #endif /* _MUX_AM43XX_H_ */ 213