xref: /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-am33xx/clock_ti81xx.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * ti81xx.h
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
5*4882a593Smuzhiyun  * Antoine Tenart, <atenart@adeneo-embedded.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This file is released under the terms of GPL v2 and any later version.
8*4882a593Smuzhiyun  * See the file COPYING in the root directory of the source tree for details.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef _CLOCK_TI81XX_H_
12*4882a593Smuzhiyun #define _CLOCK_TI81XX_H_
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define PRCM_MOD_EN     0x2
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define CM_DEFAULT_BASE (PRCM_BASE + 0x0500)
17*4882a593Smuzhiyun #define CM_ALWON_BASE   (PRCM_BASE + 0x1400)
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun struct cm_def {
20*4882a593Smuzhiyun 	unsigned int resv0[2];
21*4882a593Smuzhiyun 	unsigned int l3fastclkstctrl;
22*4882a593Smuzhiyun 	unsigned int resv1[1];
23*4882a593Smuzhiyun 	unsigned int pciclkstctrl;
24*4882a593Smuzhiyun 	unsigned int resv2[1];
25*4882a593Smuzhiyun 	unsigned int ducaticlkstctrl;
26*4882a593Smuzhiyun 	unsigned int resv3[1];
27*4882a593Smuzhiyun 	unsigned int emif0clkctrl;
28*4882a593Smuzhiyun 	unsigned int emif1clkctrl;
29*4882a593Smuzhiyun 	unsigned int dmmclkctrl;
30*4882a593Smuzhiyun 	unsigned int fwclkctrl;
31*4882a593Smuzhiyun 	unsigned int resv4[10];
32*4882a593Smuzhiyun 	unsigned int usbclkctrl;
33*4882a593Smuzhiyun 	unsigned int resv5[1];
34*4882a593Smuzhiyun 	unsigned int sataclkctrl;
35*4882a593Smuzhiyun 	unsigned int resv6[4];
36*4882a593Smuzhiyun 	unsigned int ducaticlkctrl;
37*4882a593Smuzhiyun 	unsigned int pciclkctrl;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct cm_alwon {
41*4882a593Smuzhiyun 	unsigned int l3slowclkstctrl;
42*4882a593Smuzhiyun 	unsigned int ethclkstctrl;
43*4882a593Smuzhiyun 	unsigned int l3medclkstctrl;
44*4882a593Smuzhiyun 	unsigned int mmu_clkstctrl;
45*4882a593Smuzhiyun 	unsigned int mmucfg_clkstctrl;
46*4882a593Smuzhiyun 	unsigned int ocmc0clkstctrl;
47*4882a593Smuzhiyun #if defined(CONFIG_TI814X)
48*4882a593Smuzhiyun 	unsigned int vcpclkstctrl;
49*4882a593Smuzhiyun #elif defined(CONFIG_TI816X)
50*4882a593Smuzhiyun 	unsigned int ocmc1clkstctrl;
51*4882a593Smuzhiyun #endif
52*4882a593Smuzhiyun 	unsigned int mpuclkstctrl;
53*4882a593Smuzhiyun 	unsigned int sysclk4clkstctrl;
54*4882a593Smuzhiyun 	unsigned int sysclk5clkstctrl;
55*4882a593Smuzhiyun 	unsigned int sysclk6clkstctrl;
56*4882a593Smuzhiyun 	unsigned int rtcclkstctrl;
57*4882a593Smuzhiyun 	unsigned int l3fastclkstctrl;
58*4882a593Smuzhiyun 	unsigned int resv0[67];
59*4882a593Smuzhiyun 	unsigned int mcasp0clkctrl;
60*4882a593Smuzhiyun 	unsigned int mcasp1clkctrl;
61*4882a593Smuzhiyun 	unsigned int mcasp2clkctrl;
62*4882a593Smuzhiyun 	unsigned int mcbspclkctrl;
63*4882a593Smuzhiyun 	unsigned int uart0clkctrl;
64*4882a593Smuzhiyun 	unsigned int uart1clkctrl;
65*4882a593Smuzhiyun 	unsigned int uart2clkctrl;
66*4882a593Smuzhiyun 	unsigned int gpio0clkctrl;
67*4882a593Smuzhiyun 	unsigned int gpio1clkctrl;
68*4882a593Smuzhiyun 	unsigned int i2c0clkctrl;
69*4882a593Smuzhiyun 	unsigned int i2c1clkctrl;
70*4882a593Smuzhiyun #if defined(CONFIG_TI814X)
71*4882a593Smuzhiyun 	unsigned int mcasp345clkctrl;
72*4882a593Smuzhiyun 	unsigned int atlclkctrl;
73*4882a593Smuzhiyun 	unsigned int mlbclkctrl;
74*4882a593Smuzhiyun 	unsigned int pataclkctrl;
75*4882a593Smuzhiyun 	unsigned int resv1[1];
76*4882a593Smuzhiyun 	unsigned int uart3clkctrl;
77*4882a593Smuzhiyun 	unsigned int uart4clkctrl;
78*4882a593Smuzhiyun 	unsigned int uart5clkctrl;
79*4882a593Smuzhiyun #elif defined(CONFIG_TI816X)
80*4882a593Smuzhiyun 	unsigned int resv1[1];
81*4882a593Smuzhiyun 	unsigned int timer1clkctrl;
82*4882a593Smuzhiyun 	unsigned int timer2clkctrl;
83*4882a593Smuzhiyun 	unsigned int timer3clkctrl;
84*4882a593Smuzhiyun 	unsigned int timer4clkctrl;
85*4882a593Smuzhiyun 	unsigned int timer5clkctrl;
86*4882a593Smuzhiyun 	unsigned int timer6clkctrl;
87*4882a593Smuzhiyun 	unsigned int timer7clkctrl;
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun 	unsigned int wdtimerclkctrl;
90*4882a593Smuzhiyun 	unsigned int spiclkctrl;
91*4882a593Smuzhiyun 	unsigned int mailboxclkctrl;
92*4882a593Smuzhiyun 	unsigned int spinboxclkctrl;
93*4882a593Smuzhiyun 	unsigned int mmudataclkctrl;
94*4882a593Smuzhiyun 	unsigned int resv2[2];
95*4882a593Smuzhiyun 	unsigned int mmucfgclkctrl;
96*4882a593Smuzhiyun #if defined(CONFIG_TI814X)
97*4882a593Smuzhiyun 	unsigned int resv3[2];
98*4882a593Smuzhiyun #elif defined(CONFIG_TI816X)
99*4882a593Smuzhiyun 	unsigned int resv3[1];
100*4882a593Smuzhiyun 	unsigned int sdioclkctrl;
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun 	unsigned int ocmc0clkctrl;
103*4882a593Smuzhiyun #if defined(CONFIG_TI814X)
104*4882a593Smuzhiyun 	unsigned int vcpclkctrl;
105*4882a593Smuzhiyun #elif defined(CONFIG_TI816X)
106*4882a593Smuzhiyun 	unsigned int ocmc1clkctrl;
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun 	unsigned int resv4[2];
109*4882a593Smuzhiyun 	unsigned int controlclkctrl;
110*4882a593Smuzhiyun 	unsigned int resv5[2];
111*4882a593Smuzhiyun 	unsigned int gpmcclkctrl;
112*4882a593Smuzhiyun 	unsigned int ethernet0clkctrl;
113*4882a593Smuzhiyun 	unsigned int ethernet1clkctrl;
114*4882a593Smuzhiyun 	unsigned int mpuclkctrl;
115*4882a593Smuzhiyun #if defined(CONFIG_TI814X)
116*4882a593Smuzhiyun 	unsigned int debugssclkctrl;
117*4882a593Smuzhiyun #elif defined(CONFIG_TI816X)
118*4882a593Smuzhiyun 	unsigned int resv6[1];
119*4882a593Smuzhiyun #endif
120*4882a593Smuzhiyun 	unsigned int l3clkctrl;
121*4882a593Smuzhiyun 	unsigned int l4hsclkctrl;
122*4882a593Smuzhiyun 	unsigned int l4lsclkctrl;
123*4882a593Smuzhiyun 	unsigned int rtcclkctrl;
124*4882a593Smuzhiyun 	unsigned int tpccclkctrl;
125*4882a593Smuzhiyun 	unsigned int tptc0clkctrl;
126*4882a593Smuzhiyun 	unsigned int tptc1clkctrl;
127*4882a593Smuzhiyun 	unsigned int tptc2clkctrl;
128*4882a593Smuzhiyun 	unsigned int tptc3clkctrl;
129*4882a593Smuzhiyun #if defined(CONFIG_TI814X)
130*4882a593Smuzhiyun 	unsigned int resv6[4];
131*4882a593Smuzhiyun 	unsigned int dcan01clkctrl;
132*4882a593Smuzhiyun 	unsigned int mmchs0clkctrl;
133*4882a593Smuzhiyun 	unsigned int mmchs1clkctrl;
134*4882a593Smuzhiyun 	unsigned int mmchs2clkctrl;
135*4882a593Smuzhiyun 	unsigned int custefuseclkctrl;
136*4882a593Smuzhiyun #elif defined(CONFIG_TI816X)
137*4882a593Smuzhiyun 	unsigned int sr0clkctrl;
138*4882a593Smuzhiyun 	unsigned int sr1clkctrl;
139*4882a593Smuzhiyun #endif
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #endif /* _CLOCK_TI81XX_H_ */
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