1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Xilinx ZC770 XM010 board DTS 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013 - 2015 Xilinx, Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun#include "zynq-7000.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; 13*4882a593Smuzhiyun model = "Xilinx Zynq"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun ethernet0 = &gem0; 17*4882a593Smuzhiyun i2c0 = &i2c0; 18*4882a593Smuzhiyun serial0 = &uart1; 19*4882a593Smuzhiyun spi0 = &qspi; 20*4882a593Smuzhiyun spi1 = &spi1; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun chosen { 24*4882a593Smuzhiyun bootargs = ""; 25*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun memory@0 { 29*4882a593Smuzhiyun device_type = "memory"; 30*4882a593Smuzhiyun reg = <0x0 0x40000000>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun usb_phy0: phy0 { 34*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 35*4882a593Smuzhiyun #phy-cells = <0>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&can0 { 40*4882a593Smuzhiyun status = "okay"; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&gem0 { 44*4882a593Smuzhiyun status = "okay"; 45*4882a593Smuzhiyun phy-mode = "rgmii-id"; 46*4882a593Smuzhiyun phy-handle = <ðernet_phy>; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun ethernet_phy: ethernet-phy@7 { 49*4882a593Smuzhiyun reg = <7>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&i2c0 { 54*4882a593Smuzhiyun status = "okay"; 55*4882a593Smuzhiyun clock-frequency = <400000>; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun m24c02_eeprom@52 { 58*4882a593Smuzhiyun compatible = "at,24c02"; 59*4882a593Smuzhiyun reg = <0x52>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&qspi { 65*4882a593Smuzhiyun status = "okay"; 66*4882a593Smuzhiyun}; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun&sdhci0 { 69*4882a593Smuzhiyun status = "okay"; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&spi1 { 73*4882a593Smuzhiyun status = "okay"; 74*4882a593Smuzhiyun num-cs = <4>; 75*4882a593Smuzhiyun is-decoded-cs = <0>; 76*4882a593Smuzhiyun flash@0 { 77*4882a593Smuzhiyun compatible = "sst25wf080"; 78*4882a593Smuzhiyun reg = <1>; 79*4882a593Smuzhiyun spi-max-frequency = <1000000>; 80*4882a593Smuzhiyun #address-cells = <1>; 81*4882a593Smuzhiyun #size-cells = <1>; 82*4882a593Smuzhiyun partition@test { 83*4882a593Smuzhiyun label = "spi-flash"; 84*4882a593Smuzhiyun reg = <0x0 0x100000>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun}; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun&uart1 { 90*4882a593Smuzhiyun u-boot,dm-pre-reloc; 91*4882a593Smuzhiyun status = "okay"; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&usb0 { 95*4882a593Smuzhiyun status = "okay"; 96*4882a593Smuzhiyun dr_mode = "host"; 97*4882a593Smuzhiyun usb-phy = <&usb_phy0>; 98*4882a593Smuzhiyun}; 99