1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for UniPhier Support Card (Expansion Board) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2015-2017 Socionext Inc. 5*4882a593Smuzhiyun * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&system_bus { 11*4882a593Smuzhiyun status = "okay"; 12*4882a593Smuzhiyun ranges = <1 0x00000000 0x42000000 0x02000000>; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun support_card: support_card@1,1f00000 { 15*4882a593Smuzhiyun compatible = "simple-bus"; 16*4882a593Smuzhiyun #address-cells = <1>; 17*4882a593Smuzhiyun #size-cells = <1>; 18*4882a593Smuzhiyun ranges = <0x00000000 1 0x01f00000 0x00100000>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun ethsc: ethernet@0 { 21*4882a593Smuzhiyun compatible = "smsc,lan9118", "smsc,lan9115"; 22*4882a593Smuzhiyun reg = <0x00000000 0x1000>; 23*4882a593Smuzhiyun phy-mode = "mii"; 24*4882a593Smuzhiyun reg-io-width = <4>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun serialsc: uart@b0000 { 28*4882a593Smuzhiyun compatible = "ns16550a"; 29*4882a593Smuzhiyun reg = <0x000b0000 0x20>; 30*4882a593Smuzhiyun clock-frequency = <12288000>; 31*4882a593Smuzhiyun reg-shift = <1>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun}; 35