1*4882a593Smuzhiyun/dts-v1/; 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun#include "tegra210.dtsi" 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/ { 6*4882a593Smuzhiyun model = "NVIDIA P2571"; 7*4882a593Smuzhiyun compatible = "nvidia,p2571", "nvidia,tegra210"; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun chosen { 10*4882a593Smuzhiyun stdout-path = &uarta; 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun i2c0 = "/i2c@7000d000"; 15*4882a593Smuzhiyun i2c1 = "/i2c@7000c000"; 16*4882a593Smuzhiyun i2c2 = "/i2c@7000c400"; 17*4882a593Smuzhiyun i2c3 = "/i2c@7000c500"; 18*4882a593Smuzhiyun i2c4 = "/i2c@7000c700"; 19*4882a593Smuzhiyun i2c5 = "/i2c@7000d100"; 20*4882a593Smuzhiyun mmc0 = "/sdhci@700b0600"; 21*4882a593Smuzhiyun mmc1 = "/sdhci@700b0000"; 22*4882a593Smuzhiyun spi0 = "/spi@7000d400"; 23*4882a593Smuzhiyun spi1 = "/spi@7000da00"; 24*4882a593Smuzhiyun spi2 = "/spi@70410000"; 25*4882a593Smuzhiyun usb0 = "/usb@7d000000"; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun memory { 29*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0xc0000000>; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun i2c@7000c000 { 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun clock-frequency = <100000>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun i2c@7000c400 { 38*4882a593Smuzhiyun status = "okay"; 39*4882a593Smuzhiyun clock-frequency = <100000>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun i2c@7000c500 { 43*4882a593Smuzhiyun status = "okay"; 44*4882a593Smuzhiyun clock-frequency = <100000>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun i2c@7000c700 { 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun clock-frequency = <100000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun i2c@7000d000 { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun clock-frequency = <400000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun i2c@7000d100 { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun clock-frequency = <400000>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun spi@7000d400 { 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun spi-max-frequency = <25000000>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun spi@7000da00 { 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun spi-max-frequency = <25000000>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun spi@70410000 { 73*4882a593Smuzhiyun status = "okay"; 74*4882a593Smuzhiyun spi-max-frequency = <24000000>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun sdhci@700b0000 { 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; 80*4882a593Smuzhiyun power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 81*4882a593Smuzhiyun bus-width = <4>; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun sdhci@700b0600 { 85*4882a593Smuzhiyun status = "okay"; 86*4882a593Smuzhiyun bus-width = <8>; 87*4882a593Smuzhiyun non-removable; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun usb@7d000000 { 91*4882a593Smuzhiyun status = "okay"; 92*4882a593Smuzhiyun dr_mode = "otg"; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun clocks { 96*4882a593Smuzhiyun compatible = "simple-bus"; 97*4882a593Smuzhiyun #address-cells = <1>; 98*4882a593Smuzhiyun #size-cells = <0>; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun clk32k_in: clock@0 { 101*4882a593Smuzhiyun compatible = "fixed-clock"; 102*4882a593Smuzhiyun reg = <0>; 103*4882a593Smuzhiyun #clock-cells = <0>; 104*4882a593Smuzhiyun clock-frequency = <32768>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&uarta { 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun}; 112