1*4882a593Smuzhiyun/dts-v1/; 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun#include "tegra20-tamonten.dtsi" 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/ { 6*4882a593Smuzhiyun model = "Avionic Design Tamonten Evaluation Carrier"; 7*4882a593Smuzhiyun compatible = "ad,tec", "nvidia,tegra20"; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun chosen { 10*4882a593Smuzhiyun stdout-path = &uartd; 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun usb0 = "/usb@c5008000"; 15*4882a593Smuzhiyun mmc0 = "/sdhci@c8000600"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory { 19*4882a593Smuzhiyun reg = <0x00000000 0x20000000>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun host1x@50000000 { 23*4882a593Smuzhiyun status = "okay"; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun dc@54200000 { 26*4882a593Smuzhiyun status = "okay"; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun rgb { 29*4882a593Smuzhiyun nvidia,panel = <&lcd_panel>; 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun serial@70006300 { 36*4882a593Smuzhiyun clock-frequency = <216000000>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun i2c@7000c000 { 40*4882a593Smuzhiyun status = "disabled"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun i2c@7000c400 { 44*4882a593Smuzhiyun status = "disabled"; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun i2c@7000c500 { 48*4882a593Smuzhiyun status = "disabled"; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun i2c@7000d000 { 52*4882a593Smuzhiyun status = "disabled"; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun pwm: pwm@7000a000 { 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun lcd_panel: panel { 60*4882a593Smuzhiyun clock = <33260000>; 61*4882a593Smuzhiyun xres = <800>; 62*4882a593Smuzhiyun yres = <480>; 63*4882a593Smuzhiyun left-margin = <120>; 64*4882a593Smuzhiyun right-margin = <120>; 65*4882a593Smuzhiyun hsync-len = <16>; 66*4882a593Smuzhiyun lower-margin = <15>; 67*4882a593Smuzhiyun upper-margin = <15>; 68*4882a593Smuzhiyun vsync-len = <15>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun nvidia,bits-per-pixel = <16>; 71*4882a593Smuzhiyun nvidia,pwm = <&pwm 0 500000>; 72*4882a593Smuzhiyun nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5) 73*4882a593Smuzhiyun GPIO_ACTIVE_HIGH>; 74*4882a593Smuzhiyun nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2) 75*4882a593Smuzhiyun GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0) 77*4882a593Smuzhiyun GPIO_ACTIVE_HIGH>; 78*4882a593Smuzhiyun nvidia,panel-timings = <0 0 0 0>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun}; 81