xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/tegra20-colibri.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/dts-v1/;
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun#include "tegra20.dtsi"
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun/ {
6*4882a593Smuzhiyun	model = "Toradex Colibri T20";
7*4882a593Smuzhiyun	compatible = "toradex,colibri_t20", "nvidia,tegra20";
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun	chosen {
10*4882a593Smuzhiyun		stdout-path = &uarta;
11*4882a593Smuzhiyun	};
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	aliases {
14*4882a593Smuzhiyun		i2c0 = "/i2c@7000d000";
15*4882a593Smuzhiyun		i2c1 = "/i2c@7000c000";
16*4882a593Smuzhiyun		i2c2 = "/i2c@7000c400";
17*4882a593Smuzhiyun		mmc0 = "/sdhci@c8000600";
18*4882a593Smuzhiyun		usb0 = "/usb@c5000000";
19*4882a593Smuzhiyun		usb1 = "/usb@c5004000"; /* On-module only, for ASIX */
20*4882a593Smuzhiyun		usb2 = "/usb@c5008000";
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	host1x@50000000 {
24*4882a593Smuzhiyun		dc@54200000 {
25*4882a593Smuzhiyun			rgb {
26*4882a593Smuzhiyun				status = "okay";
27*4882a593Smuzhiyun				nvidia,panel = <&lcd_panel>;
28*4882a593Smuzhiyun				display-timings {
29*4882a593Smuzhiyun					timing@0 {
30*4882a593Smuzhiyun						/* VESA VGA */
31*4882a593Smuzhiyun						clock-frequency = <25175000>;
32*4882a593Smuzhiyun						hactive = <640>;
33*4882a593Smuzhiyun						vactive = <480>;
34*4882a593Smuzhiyun						hback-porch = <48>;
35*4882a593Smuzhiyun						hfront-porch = <16>;
36*4882a593Smuzhiyun						hsync-len = <96>;
37*4882a593Smuzhiyun						vback-porch = <31>;
38*4882a593Smuzhiyun						vfront-porch = <11>;
39*4882a593Smuzhiyun						vsync-len = <2>;
40*4882a593Smuzhiyun					};
41*4882a593Smuzhiyun				};
42*4882a593Smuzhiyun			};
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	nand-controller@70008000 {
47*4882a593Smuzhiyun		nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
48*4882a593Smuzhiyun		nvidia,width = <8>;
49*4882a593Smuzhiyun		nvidia,timing = <15 100 25 80 25 10 15 10 100>;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		nand@0 {
52*4882a593Smuzhiyun			reg = <0>;
53*4882a593Smuzhiyun			compatible = "nand-flash";
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	pwm@7000a000 {
58*4882a593Smuzhiyun		status = "okay";
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	/*
62*4882a593Smuzhiyun	 * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
63*4882a593Smuzhiyun	 * board)
64*4882a593Smuzhiyun	 */
65*4882a593Smuzhiyun	i2c@7000c000 {
66*4882a593Smuzhiyun		status = "okay";
67*4882a593Smuzhiyun		clock-frequency = <400000>;
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun	/* GEN2_I2C: unused */
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun	/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
73*4882a593Smuzhiyun	i2c@7000c400 {
74*4882a593Smuzhiyun		status = "okay";
75*4882a593Smuzhiyun		clock-frequency = <10000>;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	/*
79*4882a593Smuzhiyun	 * PWR_I2C: power I2C to PMIC and temperature sensor
80*4882a593Smuzhiyun	 */
81*4882a593Smuzhiyun	i2c@7000d000 {
82*4882a593Smuzhiyun		status = "okay";
83*4882a593Smuzhiyun		clock-frequency = <100000>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
87*4882a593Smuzhiyun	usb@c5000000 {
88*4882a593Smuzhiyun		status = "okay";
89*4882a593Smuzhiyun		dr_mode = "otg";
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	/* EHCI instance 1: ULPI -> USB3340 -> AX88772B */
93*4882a593Smuzhiyun	usb@c5004000 {
94*4882a593Smuzhiyun		status = "okay";
95*4882a593Smuzhiyun		/* ULPI_RESET */
96*4882a593Smuzhiyun		nvidia,phy-reset-gpio =
97*4882a593Smuzhiyun				<&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>;
98*4882a593Smuzhiyun		/* VBUS_LAN */
99*4882a593Smuzhiyun		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
100*4882a593Smuzhiyun	};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun	/* EHCI instance 2: USB3_DP/N -> USBH_P/N */
103*4882a593Smuzhiyun	usb@c5008000 {
104*4882a593Smuzhiyun		status = "okay";
105*4882a593Smuzhiyun		/* USBH_PEN */
106*4882a593Smuzhiyun		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	sdhci@c8000600 {
110*4882a593Smuzhiyun		status = "okay";
111*4882a593Smuzhiyun		bus-width = <4>;
112*4882a593Smuzhiyun		cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	backlight: backlight {
116*4882a593Smuzhiyun		compatible = "pwm-backlight";
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		brightness-levels = <255 128 64 32 16 8 4 0>;
119*4882a593Smuzhiyun		default-brightness-level = <6>;
120*4882a593Smuzhiyun		/* BL_ON */
121*4882a593Smuzhiyun		enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
122*4882a593Smuzhiyun		power-supply = <&reg_3v3>;
123*4882a593Smuzhiyun		/* PWM<A> */
124*4882a593Smuzhiyun		pwms = <&pwm 0 5000000>;
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun	clocks {
128*4882a593Smuzhiyun		compatible = "simple-bus";
129*4882a593Smuzhiyun		#address-cells = <1>;
130*4882a593Smuzhiyun		#size-cells = <0>;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun		clk32k_in: clock@0 {
133*4882a593Smuzhiyun			compatible = "fixed-clock";
134*4882a593Smuzhiyun			reg=<0>;
135*4882a593Smuzhiyun			#clock-cells = <0>;
136*4882a593Smuzhiyun			clock-frequency = <32768>;
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	lcd_panel: panel {
141*4882a593Smuzhiyun		/*
142*4882a593Smuzhiyun		 * edt,et057090dhu: EDT 5.7" LCD TFT
143*4882a593Smuzhiyun		 * edt,et070080dh6: EDT 7.0" LCD TFT
144*4882a593Smuzhiyun		 */
145*4882a593Smuzhiyun		compatible = "edt,et057090dhu", "simple-panel";
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun		backlight = <&backlight>;
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	regulators {
151*4882a593Smuzhiyun		compatible = "simple-bus";
152*4882a593Smuzhiyun		#address-cells = <1>;
153*4882a593Smuzhiyun		#size-cells = <0>;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun		reg_3v3: regulator@0 {
156*4882a593Smuzhiyun			compatible = "regulator-fixed";
157*4882a593Smuzhiyun			reg = <0>;
158*4882a593Smuzhiyun			regulator-name = "+V3.3";
159*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
160*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
161*4882a593Smuzhiyun			regulator-always-on;
162*4882a593Smuzhiyun		};
163*4882a593Smuzhiyun	};
164*4882a593Smuzhiyun};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun&uarta {
167*4882a593Smuzhiyun	status = "okay";
168*4882a593Smuzhiyun};
169