1*4882a593Smuzhiyun#include "tegra186.dtsi" 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun/ { 4*4882a593Smuzhiyun model = "NVIDIA P2771-0000"; 5*4882a593Smuzhiyun compatible = "nvidia,p2771-0000", "nvidia,tegra186"; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun chosen { 8*4882a593Smuzhiyun stdout-path = &uarta; 9*4882a593Smuzhiyun }; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun aliases { 12*4882a593Smuzhiyun mmc0 = "/sdhci@3460000"; 13*4882a593Smuzhiyun mmc1 = "/sdhci@3400000"; 14*4882a593Smuzhiyun i2c0 = "/bpmp/i2c"; 15*4882a593Smuzhiyun i2c1 = "/i2c@3160000"; 16*4882a593Smuzhiyun i2c2 = "/i2c@c240000"; 17*4882a593Smuzhiyun i2c3 = "/i2c@3180000"; 18*4882a593Smuzhiyun i2c4 = "/i2c@3190000"; 19*4882a593Smuzhiyun i2c5 = "/i2c@31c0000"; 20*4882a593Smuzhiyun i2c6 = "/i2c@c250000"; 21*4882a593Smuzhiyun i2c7 = "/i2c@31e0000"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun memory { 25*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0x60000000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun ethernet@2490000 { 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun phy-reset-gpios = <&gpio_main TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun i2c@3160000 { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun i2c@3180000 { 38*4882a593Smuzhiyun status = "okay"; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun i2c@3190000 { 42*4882a593Smuzhiyun status = "okay"; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun i2c@31c0000 { 46*4882a593Smuzhiyun status = "okay"; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun sdhci@3400000 { 50*4882a593Smuzhiyun status = "okay"; 51*4882a593Smuzhiyun wp-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun bus-width = <4>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun sdhci@3460000 { 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun bus-width = <8>; 58*4882a593Smuzhiyun non-removable; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun i2c@c240000 { 62*4882a593Smuzhiyun status = "okay"; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun i2c@c250000 { 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun i2c@31e0000 { 70*4882a593Smuzhiyun status = "okay"; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun bpmp { 74*4882a593Smuzhiyun i2c { 75*4882a593Smuzhiyun status = "okay"; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun&uarta { 81*4882a593Smuzhiyun status = "okay"; 82*4882a593Smuzhiyun}; 83