1*4882a593Smuzhiyun/dts-v1/; 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun#include "tegra114.dtsi" 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/ { 6*4882a593Smuzhiyun model = "NVIDIA Dalmore"; 7*4882a593Smuzhiyun compatible = "nvidia,dalmore", "nvidia,tegra114"; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun chosen { 10*4882a593Smuzhiyun stdout-path = &uartd; 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun aliases { 14*4882a593Smuzhiyun i2c0 = "/i2c@7000d000"; 15*4882a593Smuzhiyun i2c1 = "/i2c@7000c000"; 16*4882a593Smuzhiyun i2c2 = "/i2c@7000c400"; 17*4882a593Smuzhiyun i2c3 = "/i2c@7000c500"; 18*4882a593Smuzhiyun i2c4 = "/i2c@7000c700"; 19*4882a593Smuzhiyun mmc0 = "/sdhci@78000600"; 20*4882a593Smuzhiyun mmc1 = "/sdhci@78000400"; 21*4882a593Smuzhiyun usb0 = "/usb@7d000000"; 22*4882a593Smuzhiyun usb1 = "/usb@7d008000"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun memory { 26*4882a593Smuzhiyun device_type = "memory"; 27*4882a593Smuzhiyun reg = <0x80000000 0x80000000>; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun i2c@7000c000 { 31*4882a593Smuzhiyun status = "okay"; 32*4882a593Smuzhiyun clock-frequency = <100000>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun i2c@7000c400 { 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun clock-frequency = <100000>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun i2c@7000c500 { 41*4882a593Smuzhiyun status = "okay"; 42*4882a593Smuzhiyun clock-frequency = <100000>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun i2c@7000c700 { 46*4882a593Smuzhiyun status = "okay"; 47*4882a593Smuzhiyun clock-frequency = <100000>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun i2c@7000d000 { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun clock-frequency = <400000>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun spi@7000da00 { 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun spi-max-frequency = <25000000>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun sdhci@78000400 { 61*4882a593Smuzhiyun cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 62*4882a593Smuzhiyun bus-width = <4>; 63*4882a593Smuzhiyun status = "okay"; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun sdhci@78000600 { 67*4882a593Smuzhiyun bus-width = <8>; 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun non-removable; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun usb@7d000000 { 73*4882a593Smuzhiyun status = "okay"; 74*4882a593Smuzhiyun dr_mode = "otg"; 75*4882a593Smuzhiyun nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun usb@7d008000 { 79*4882a593Smuzhiyun nvidia,vbus-gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun clocks { 84*4882a593Smuzhiyun compatible = "simple-bus"; 85*4882a593Smuzhiyun #address-cells = <1>; 86*4882a593Smuzhiyun #size-cells = <0>; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun clk32k_in: clock@0 { 89*4882a593Smuzhiyun compatible = "fixed-clock"; 90*4882a593Smuzhiyun reg=<0>; 91*4882a593Smuzhiyun #clock-cells = <0>; 92*4882a593Smuzhiyun clock-frequency = <32768>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun}; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun&uartd { 98*4882a593Smuzhiyun status = "okay"; 99*4882a593Smuzhiyun}; 100