xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/socfpga_cyclone5_socrates.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "socfpga_cyclone5.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "EBV SOCrates";
11*4882a593Smuzhiyun	compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	chosen {
14*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200";
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		/*
19*4882a593Smuzhiyun		 * This allows the ethaddr uboot environment variable
20*4882a593Smuzhiyun		 * contents to be added to the gmac1 device tree blob.
21*4882a593Smuzhiyun		 */
22*4882a593Smuzhiyun		ethernet0 = &gmac1;
23*4882a593Smuzhiyun		udc0 = &usb1;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	memory {
27*4882a593Smuzhiyun		name = "memory";
28*4882a593Smuzhiyun		device_type = "memory";
29*4882a593Smuzhiyun		reg = <0x0 0x40000000>; /* 1GB */
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	soc {
33*4882a593Smuzhiyun		u-boot,dm-pre-reloc;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&gmac1 {
38*4882a593Smuzhiyun	status = "okay";
39*4882a593Smuzhiyun	phy-mode = "rgmii";
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	rxd0-skew-ps = <0>;
42*4882a593Smuzhiyun	rxd1-skew-ps = <0>;
43*4882a593Smuzhiyun	rxd2-skew-ps = <0>;
44*4882a593Smuzhiyun	rxd3-skew-ps = <0>;
45*4882a593Smuzhiyun	txen-skew-ps = <0>;
46*4882a593Smuzhiyun	txc-skew-ps = <2600>;
47*4882a593Smuzhiyun	rxdv-skew-ps = <0>;
48*4882a593Smuzhiyun	rxc-skew-ps = <2000>;
49*4882a593Smuzhiyun};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun&i2c0 {
52*4882a593Smuzhiyun	status = "okay";
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	rtc: rtc@68 {
55*4882a593Smuzhiyun		compatible = "stm,m41t82";
56*4882a593Smuzhiyun		reg = <0x68>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&mmc0 {
61*4882a593Smuzhiyun	status = "okay";
62*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
63*4882a593Smuzhiyun};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun&qspi {
66*4882a593Smuzhiyun	status = "okay";
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	flash0: n25q00@0 {
69*4882a593Smuzhiyun		#address-cells = <1>;
70*4882a593Smuzhiyun		#size-cells = <1>;
71*4882a593Smuzhiyun		compatible = "n25q00";
72*4882a593Smuzhiyun		reg = <0>;      /* chip select */
73*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
74*4882a593Smuzhiyun		m25p,fast-read;
75*4882a593Smuzhiyun		page-size = <256>;
76*4882a593Smuzhiyun		block-size = <16>; /* 2^16, 64KB */
77*4882a593Smuzhiyun		read-delay = <4>;  /* delay value in read data capture register */
78*4882a593Smuzhiyun		tshsl-ns = <50>;
79*4882a593Smuzhiyun		tsd2d-ns = <50>;
80*4882a593Smuzhiyun		tchsh-ns = <4>;
81*4882a593Smuzhiyun		tslch-ns = <4>;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun&usb1 {
86*4882a593Smuzhiyun	disable-over-current;
87*4882a593Smuzhiyun	status = "okay";
88*4882a593Smuzhiyun};
89