1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2013 Altera Corporation <www.altera.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "socfpga_arria5.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun model = "Altera SOCFPGA Arria V SoC Development Kit"; 11*4882a593Smuzhiyun compatible = "altr,socfpga-arria5", "altr,socfpga"; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun chosen { 14*4882a593Smuzhiyun bootargs = "console=ttyS0,115200"; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun memory { 18*4882a593Smuzhiyun name = "memory"; 19*4882a593Smuzhiyun device_type = "memory"; 20*4882a593Smuzhiyun reg = <0x0 0x40000000>; /* 1GB */ 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun aliases { 24*4882a593Smuzhiyun /* this allow the ethaddr uboot environment variable contents 25*4882a593Smuzhiyun * to be added to the gmac1 device tree blob. 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun ethernet0 = &gmac1; 28*4882a593Smuzhiyun udc0 = &usb1; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun regulator_3_3v: 3-3-v-regulator { 32*4882a593Smuzhiyun compatible = "regulator-fixed"; 33*4882a593Smuzhiyun regulator-name = "3.3V"; 34*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 35*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun soc { 39*4882a593Smuzhiyun u-boot,dm-pre-reloc; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&gmac1 { 44*4882a593Smuzhiyun status = "okay"; 45*4882a593Smuzhiyun phy-mode = "rgmii"; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun rxd0-skew-ps = <0>; 48*4882a593Smuzhiyun rxd1-skew-ps = <0>; 49*4882a593Smuzhiyun rxd2-skew-ps = <0>; 50*4882a593Smuzhiyun rxd3-skew-ps = <0>; 51*4882a593Smuzhiyun txen-skew-ps = <0>; 52*4882a593Smuzhiyun txc-skew-ps = <2600>; 53*4882a593Smuzhiyun rxdv-skew-ps = <0>; 54*4882a593Smuzhiyun rxc-skew-ps = <2000>; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&i2c0 { 58*4882a593Smuzhiyun status = "okay"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun eeprom@51 { 61*4882a593Smuzhiyun compatible = "atmel,24c32"; 62*4882a593Smuzhiyun reg = <0x51>; 63*4882a593Smuzhiyun pagesize = <32>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun rtc@68 { 67*4882a593Smuzhiyun compatible = "dallas,ds1339"; 68*4882a593Smuzhiyun reg = <0x68>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun&mmc0 { 73*4882a593Smuzhiyun vmmc-supply = <®ulator_3_3v>; 74*4882a593Smuzhiyun vqmmc-supply = <®ulator_3_3v>; 75*4882a593Smuzhiyun bus-width = <4>; 76*4882a593Smuzhiyun u-boot,dm-pre-reloc; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&usb1 { 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&qspi { 84*4882a593Smuzhiyun status = "okay"; 85*4882a593Smuzhiyun u-boot,dm-pre-reloc; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun flash0: n25q00@0 { 88*4882a593Smuzhiyun u-boot,dm-pre-reloc; 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <1>; 91*4882a593Smuzhiyun compatible = "n25q00"; 92*4882a593Smuzhiyun reg = <0>; /* chip select */ 93*4882a593Smuzhiyun spi-max-frequency = <50000000>; 94*4882a593Smuzhiyun m25p,fast-read; 95*4882a593Smuzhiyun page-size = <256>; 96*4882a593Smuzhiyun block-size = <16>; /* 2^16, 64KB */ 97*4882a593Smuzhiyun read-delay = <4>; /* delay value in read data capture register */ 98*4882a593Smuzhiyun tshsl-ns = <50>; 99*4882a593Smuzhiyun tsd2d-ns = <50>; 100*4882a593Smuzhiyun tchsh-ns = <4>; 101*4882a593Smuzhiyun tslch-ns = <4>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun}; 104