xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/sama5d3xmb.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun *  Copyright (C) 2013 Atmel,
5*4882a593Smuzhiyun *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Licensed under GPLv2 or later.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun#include "sama5d3xcm.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		u-boot,dm-pre-reloc;
16*4882a593Smuzhiyun		stdout-path = &dbgu;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	ahb {
20*4882a593Smuzhiyun		apb {
21*4882a593Smuzhiyun			mmc0: mmc@f0000000 {
22*4882a593Smuzhiyun				pinctrl-names = "default";
23*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
24*4882a593Smuzhiyun				status = "okay";
25*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
26*4882a593Smuzhiyun				slot@0 {
27*4882a593Smuzhiyun					reg = <0>;
28*4882a593Smuzhiyun					bus-width = <4>;
29*4882a593Smuzhiyun					cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
30*4882a593Smuzhiyun				};
31*4882a593Smuzhiyun			};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun			spi0: spi@f0004000 {
34*4882a593Smuzhiyun				dmas = <0>, <0>;	/*  Do not use DMA for spi0 */
35*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun				spi_flash@0 {
38*4882a593Smuzhiyun					compatible = "spi-flash";
39*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
40*4882a593Smuzhiyun					reg = <0>;
41*4882a593Smuzhiyun					u-boot,dm-pre-reloc;
42*4882a593Smuzhiyun				};
43*4882a593Smuzhiyun			};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun			ssc0: ssc@f0008000 {
46*4882a593Smuzhiyun				atmel,clk-from-rk-pin;
47*4882a593Smuzhiyun			};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun			/*
50*4882a593Smuzhiyun			 * i2c0 conflicts with ISI:
51*4882a593Smuzhiyun			 * disable it to allow the use of ISI
52*4882a593Smuzhiyun			 * can not enable audio when i2c0 disabled
53*4882a593Smuzhiyun			 */
54*4882a593Smuzhiyun			i2c0: i2c@f0014000 {
55*4882a593Smuzhiyun				wm8904: wm8904@1a {
56*4882a593Smuzhiyun					compatible = "wlf,wm8904";
57*4882a593Smuzhiyun					reg = <0x1a>;
58*4882a593Smuzhiyun					clocks = <&pck0>;
59*4882a593Smuzhiyun					clock-names = "mclk";
60*4882a593Smuzhiyun				};
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun			i2c1: i2c@f0018000 {
64*4882a593Smuzhiyun				ov2640: camera@0x30 {
65*4882a593Smuzhiyun					compatible = "ovti,ov2640";
66*4882a593Smuzhiyun					reg = <0x30>;
67*4882a593Smuzhiyun					pinctrl-names = "default";
68*4882a593Smuzhiyun					pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
69*4882a593Smuzhiyun					resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
70*4882a593Smuzhiyun					pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
71*4882a593Smuzhiyun					/* use pck1 for the master clock of ov2640 */
72*4882a593Smuzhiyun					clocks = <&pck1>;
73*4882a593Smuzhiyun					clock-names = "xvclk";
74*4882a593Smuzhiyun					assigned-clocks = <&pck1>;
75*4882a593Smuzhiyun					assigned-clock-rates = <25000000>;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun					port {
78*4882a593Smuzhiyun						ov2640_0: endpoint {
79*4882a593Smuzhiyun							remote-endpoint = <&isi_0>;
80*4882a593Smuzhiyun							bus-width = <8>;
81*4882a593Smuzhiyun						};
82*4882a593Smuzhiyun					};
83*4882a593Smuzhiyun				};
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun			usart1: serial@f0020000 {
87*4882a593Smuzhiyun				dmas = <0>, <0>;	/*  Do not use DMA for usart1 */
88*4882a593Smuzhiyun				pinctrl-names = "default";
89*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
90*4882a593Smuzhiyun				status = "okay";
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun			isi: isi@f0034000 {
94*4882a593Smuzhiyun				port {
95*4882a593Smuzhiyun					isi_0: endpoint {
96*4882a593Smuzhiyun						remote-endpoint = <&ov2640_0>;
97*4882a593Smuzhiyun						bus-width = <8>;
98*4882a593Smuzhiyun						vsync-active = <1>;
99*4882a593Smuzhiyun						hsync-active = <1>;
100*4882a593Smuzhiyun					};
101*4882a593Smuzhiyun				};
102*4882a593Smuzhiyun			};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun			mmc1: mmc@f8000000 {
105*4882a593Smuzhiyun				pinctrl-names = "default";
106*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
107*4882a593Smuzhiyun				status = "okay";
108*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
109*4882a593Smuzhiyun				slot@0 {
110*4882a593Smuzhiyun					reg = <0>;
111*4882a593Smuzhiyun					bus-width = <4>;
112*4882a593Smuzhiyun					cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>;
113*4882a593Smuzhiyun				};
114*4882a593Smuzhiyun			};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun			adc0: adc@f8018000 {
117*4882a593Smuzhiyun				pinctrl-names = "default";
118*4882a593Smuzhiyun				pinctrl-0 = <
119*4882a593Smuzhiyun					&pinctrl_adc0_adtrg
120*4882a593Smuzhiyun					&pinctrl_adc0_ad0
121*4882a593Smuzhiyun					&pinctrl_adc0_ad1
122*4882a593Smuzhiyun					&pinctrl_adc0_ad2
123*4882a593Smuzhiyun					&pinctrl_adc0_ad3
124*4882a593Smuzhiyun					&pinctrl_adc0_ad4
125*4882a593Smuzhiyun					>;
126*4882a593Smuzhiyun				status = "okay";
127*4882a593Smuzhiyun			};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun			macb1: ethernet@f802c000 {
130*4882a593Smuzhiyun				phy-mode = "rmii";
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun				#address-cells = <1>;
133*4882a593Smuzhiyun				#size-cells = <0>;
134*4882a593Smuzhiyun				phy0: ethernet-phy@1 {
135*4882a593Smuzhiyun					/*interrupt-parent = <&pioE>;*/
136*4882a593Smuzhiyun					/*interrupts = <30 IRQ_TYPE_EDGE_FALLING>;*/
137*4882a593Smuzhiyun					reg = <1>;
138*4882a593Smuzhiyun				};
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun			pinctrl@fffff200 {
142*4882a593Smuzhiyun				board {
143*4882a593Smuzhiyun					u-boot,dm-pre-reloc;
144*4882a593Smuzhiyun					pinctrl_mmc0_cd: mmc0_cd {
145*4882a593Smuzhiyun						u-boot,dm-pre-reloc;
146*4882a593Smuzhiyun						atmel,pins =
147*4882a593Smuzhiyun							<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */
148*4882a593Smuzhiyun					};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun					pinctrl_mmc1_cd: mmc1_cd {
151*4882a593Smuzhiyun						u-boot,dm-pre-reloc;
152*4882a593Smuzhiyun						atmel,pins =
153*4882a593Smuzhiyun							<AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */
154*4882a593Smuzhiyun					};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun					pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
157*4882a593Smuzhiyun						atmel,pins =
158*4882a593Smuzhiyun							<AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD30 periph B */
159*4882a593Smuzhiyun					};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun					pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
162*4882a593Smuzhiyun						atmel,pins =
163*4882a593Smuzhiyun							<AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD31 periph B ISI_MCK */
164*4882a593Smuzhiyun					};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun					pinctrl_sensor_reset: sensor_reset-0 {
167*4882a593Smuzhiyun						atmel,pins =
168*4882a593Smuzhiyun							<AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;   /* PE24 gpio */
169*4882a593Smuzhiyun					};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun					pinctrl_sensor_power: sensor_power-0 {
172*4882a593Smuzhiyun						atmel,pins =
173*4882a593Smuzhiyun							<AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
174*4882a593Smuzhiyun					};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun					pinctrl_usba_vbus: usba_vbus {
177*4882a593Smuzhiyun						atmel,pins =
178*4882a593Smuzhiyun							<AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */
179*4882a593Smuzhiyun					};
180*4882a593Smuzhiyun				};
181*4882a593Smuzhiyun			};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun			dbgu: serial@ffffee00 {
184*4882a593Smuzhiyun				dmas = <0>, <0>;	/*  Do not use DMA for dbgu */
185*4882a593Smuzhiyun				status = "okay";
186*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
187*4882a593Smuzhiyun			};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun			watchdog@fffffe40 {
190*4882a593Smuzhiyun				status = "okay";
191*4882a593Smuzhiyun			};
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun		usb0: gadget@00500000 {
195*4882a593Smuzhiyun			atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
196*4882a593Smuzhiyun			pinctrl-names = "default";
197*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usba_vbus>;
198*4882a593Smuzhiyun			status = "okay";
199*4882a593Smuzhiyun		};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun		usb1: ohci@00600000 {
202*4882a593Smuzhiyun			num-ports = <3>;
203*4882a593Smuzhiyun			atmel,vbus-gpio = <&pioD 25 GPIO_ACTIVE_HIGH
204*4882a593Smuzhiyun					   &pioD 26 GPIO_ACTIVE_LOW
205*4882a593Smuzhiyun					   &pioD 27 GPIO_ACTIVE_LOW
206*4882a593Smuzhiyun					  >;
207*4882a593Smuzhiyun			status = "okay";
208*4882a593Smuzhiyun		};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun		usb2: ehci@00700000 {
211*4882a593Smuzhiyun			status = "okay";
212*4882a593Smuzhiyun		};
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	sound {
216*4882a593Smuzhiyun		compatible = "atmel,asoc-wm8904";
217*4882a593Smuzhiyun		pinctrl-names = "default";
218*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun		atmel,model = "wm8904 @ SAMA5D3EK";
221*4882a593Smuzhiyun		atmel,audio-routing =
222*4882a593Smuzhiyun			"Headphone Jack", "HPOUTL",
223*4882a593Smuzhiyun			"Headphone Jack", "HPOUTR",
224*4882a593Smuzhiyun			"IN2L", "Line In Jack",
225*4882a593Smuzhiyun			"IN2R", "Line In Jack",
226*4882a593Smuzhiyun			"Mic", "MICBIAS",
227*4882a593Smuzhiyun			"IN1L", "Mic";
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun		atmel,ssc-controller = <&ssc0>;
230*4882a593Smuzhiyun		atmel,audio-codec = <&wm8904>;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun		status = "disabled";
233*4882a593Smuzhiyun	};
234*4882a593Smuzhiyun};
235