xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/sama5d3_tcb1.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * sama5d3_tcb1.dtsi - Device Tree Include file for SAMA5D3 SoC with
3*4882a593Smuzhiyun * 2 TC blocks.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Licensed under GPLv2.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include <dt-bindings/pinctrl/at91.h>
11*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
12*4882a593Smuzhiyun#include <dt-bindings/clock/at91.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		tcb1 = &tcb1;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	ahb {
20*4882a593Smuzhiyun		apb {
21*4882a593Smuzhiyun			pmc: pmc@fffffc00 {
22*4882a593Smuzhiyun				periphck {
23*4882a593Smuzhiyun					tcb1_clk: tcb1_clk@27 {
24*4882a593Smuzhiyun						#clock-cells = <0>;
25*4882a593Smuzhiyun						reg = <27>;
26*4882a593Smuzhiyun					};
27*4882a593Smuzhiyun				};
28*4882a593Smuzhiyun			};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun			tcb1: timer@f8014000 {
31*4882a593Smuzhiyun				compatible = "atmel,at91sam9x5-tcb";
32*4882a593Smuzhiyun				reg = <0xf8014000 0x100>;
33*4882a593Smuzhiyun				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
34*4882a593Smuzhiyun				clocks = <&tcb1_clk>, <&clk32k>;
35*4882a593Smuzhiyun				clock-names = "t0_clk", "slow_clk";
36*4882a593Smuzhiyun			};
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun};
40