xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/s5pc100-pinctrl.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * U-Boot additions to enable a generic Exynos GPIO driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2014 Google, Inc
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	pinctrl@e0300000 {
11*4882a593Smuzhiyun		gpa0: gpa0 {
12*4882a593Smuzhiyun			gpio-controller;
13*4882a593Smuzhiyun			#gpio-cells = <2>;
14*4882a593Smuzhiyun		};
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun		gpa1: gpa1 {
17*4882a593Smuzhiyun			gpio-controller;
18*4882a593Smuzhiyun			#gpio-cells = <2>;
19*4882a593Smuzhiyun		};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun		gpb: gpb {
22*4882a593Smuzhiyun			gpio-controller;
23*4882a593Smuzhiyun			#gpio-cells = <2>;
24*4882a593Smuzhiyun		};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		gpc: gpc {
27*4882a593Smuzhiyun			gpio-controller;
28*4882a593Smuzhiyun			#gpio-cells = <2>;
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		gpd: gpd {
32*4882a593Smuzhiyun			gpio-controller;
33*4882a593Smuzhiyun			#gpio-cells = <2>;
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun		gpe0: gpe0 {
37*4882a593Smuzhiyun			gpio-controller;
38*4882a593Smuzhiyun			#gpio-cells = <2>;
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		gpe1: gpe1 {
42*4882a593Smuzhiyun			gpio-controller;
43*4882a593Smuzhiyun			#gpio-cells = <2>;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		gpf0: gpf0 {
47*4882a593Smuzhiyun			gpio-controller;
48*4882a593Smuzhiyun			#gpio-cells = <2>;
49*4882a593Smuzhiyun		};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun		gpf1: gpf1 {
52*4882a593Smuzhiyun			gpio-controller;
53*4882a593Smuzhiyun			#gpio-cells = <2>;
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		gpf2: gpf2 {
57*4882a593Smuzhiyun			gpio-controller;
58*4882a593Smuzhiyun			#gpio-cells = <2>;
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun		gpf3: gpf3 {
62*4882a593Smuzhiyun			gpio-controller;
63*4882a593Smuzhiyun			#gpio-cells = <2>;
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		gpg0: gpg0 {
67*4882a593Smuzhiyun			gpio-controller;
68*4882a593Smuzhiyun			#gpio-cells = <2>;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		gpg1: gpg1 {
72*4882a593Smuzhiyun			gpio-controller;
73*4882a593Smuzhiyun			#gpio-cells = <2>;
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun		gpg2: gpg2 {
77*4882a593Smuzhiyun			gpio-controller;
78*4882a593Smuzhiyun			#gpio-cells = <2>;
79*4882a593Smuzhiyun		};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun		gpg3: gpg3 {
82*4882a593Smuzhiyun			gpio-controller;
83*4882a593Smuzhiyun			#gpio-cells = <2>;
84*4882a593Smuzhiyun		};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun		gpi: gpi {
87*4882a593Smuzhiyun			gpio-controller;
88*4882a593Smuzhiyun			#gpio-cells = <2>;
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		gpj0: gpj0 {
92*4882a593Smuzhiyun			gpio-controller;
93*4882a593Smuzhiyun			#gpio-cells = <2>;
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		gpj1: gpj1 {
97*4882a593Smuzhiyun			gpio-controller;
98*4882a593Smuzhiyun			#gpio-cells = <2>;
99*4882a593Smuzhiyun		};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		gpj2: gpj2 {
102*4882a593Smuzhiyun			gpio-controller;
103*4882a593Smuzhiyun			#gpio-cells = <2>;
104*4882a593Smuzhiyun		};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun		gpj3: gpj3 {
107*4882a593Smuzhiyun			gpio-controller;
108*4882a593Smuzhiyun			#gpio-cells = <2>;
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		gpj4: gpj4 {
112*4882a593Smuzhiyun			gpio-controller;
113*4882a593Smuzhiyun			#gpio-cells = <2>;
114*4882a593Smuzhiyun		};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun		gpk0: gpk0 {
117*4882a593Smuzhiyun			gpio-controller;
118*4882a593Smuzhiyun			#gpio-cells = <2>;
119*4882a593Smuzhiyun		};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun		gpk1: gpk1 {
122*4882a593Smuzhiyun			gpio-controller;
123*4882a593Smuzhiyun			#gpio-cells = <2>;
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		gpk2: gpk2 {
127*4882a593Smuzhiyun			gpio-controller;
128*4882a593Smuzhiyun			#gpio-cells = <2>;
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		gpk3: gpk3 {
132*4882a593Smuzhiyun			gpio-controller;
133*4882a593Smuzhiyun			#gpio-cells = <2>;
134*4882a593Smuzhiyun		};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun		gpl0: gpl0 {
137*4882a593Smuzhiyun			gpio-controller;
138*4882a593Smuzhiyun			#gpio-cells = <2>;
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun		gpl1: gpl1 {
142*4882a593Smuzhiyun			gpio-controller;
143*4882a593Smuzhiyun			#gpio-cells = <2>;
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		gpl2: gpl2 {
147*4882a593Smuzhiyun			gpio-controller;
148*4882a593Smuzhiyun			#gpio-cells = <2>;
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		gpl3: gpl3 {
152*4882a593Smuzhiyun			gpio-controller;
153*4882a593Smuzhiyun			#gpio-cells = <2>;
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun		gpl4: gpl4 {
157*4882a593Smuzhiyun			gpio-controller;
158*4882a593Smuzhiyun			#gpio-cells = <2>;
159*4882a593Smuzhiyun		};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		gph0: gph0 {
162*4882a593Smuzhiyun			gpio-controller;
163*4882a593Smuzhiyun			#gpio-cells = <2>;
164*4882a593Smuzhiyun		};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun		gph1: gph1 {
167*4882a593Smuzhiyun			gpio-controller;
168*4882a593Smuzhiyun			#gpio-cells = <2>;
169*4882a593Smuzhiyun		};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun		gph2: gph2 {
172*4882a593Smuzhiyun			gpio-controller;
173*4882a593Smuzhiyun			#gpio-cells = <2>;
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		gph3: gph3 {
177*4882a593Smuzhiyun			gpio-controller;
178*4882a593Smuzhiyun			#gpio-cells = <2>;
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun};
183