xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rv1126-bat-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2021 Fuzhou Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rv1126.dtsi"
8*4882a593Smuzhiyun#include "rv1126-u-boot.dtsi"
9*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Rockchip RV1126 Battery Evaluation Board";
13*4882a593Smuzhiyun	compatible = "rockchip,rv1126-bat-evb", "rockchip,rv1126";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		stdout-path = &uart2;
17*4882a593Smuzhiyun		u-boot,spl-boot-order = &spi_nor, &emmc;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	adc-keys {
21*4882a593Smuzhiyun		compatible = "adc-keys";
22*4882a593Smuzhiyun		io-channels = <&saradc 0>;
23*4882a593Smuzhiyun		io-channel-names = "buttons";
24*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
25*4882a593Smuzhiyun		u-boot,dm-spl;
26*4882a593Smuzhiyun		status = "okay";
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		volumeup-key {
29*4882a593Smuzhiyun			u-boot,dm-spl;
30*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
31*4882a593Smuzhiyun			label = "volume up";
32*4882a593Smuzhiyun			press-threshold-microvolt = <60000>;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&clk_out_ethernetm1_pins {
38*4882a593Smuzhiyun	status = "disabled";
39*4882a593Smuzhiyun};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun&emmc {
42*4882a593Smuzhiyun	bus-width = <8>;
43*4882a593Smuzhiyun	mmc-hs200-1_8v;
44*4882a593Smuzhiyun	status = "okay";
45*4882a593Smuzhiyun};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun&gpio1 {
48*4882a593Smuzhiyun	status = "disabled";
49*4882a593Smuzhiyun};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun&gpio3 {
52*4882a593Smuzhiyun	status = "disabled";
53*4882a593Smuzhiyun};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun&gmac {
56*4882a593Smuzhiyun	status = "disabled";
57*4882a593Smuzhiyun};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun&gmac_clkin_m0 {
60*4882a593Smuzhiyun	status = "disabled";
61*4882a593Smuzhiyun};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun&gmac_clkini_m1 {
64*4882a593Smuzhiyun	status = "disabled";
65*4882a593Smuzhiyun};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun&i2c0 {
68*4882a593Smuzhiyun	status = "disabled";
69*4882a593Smuzhiyun};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun&mdio {
72*4882a593Smuzhiyun	status = "disabled";
73*4882a593Smuzhiyun};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun&mtl_rx_setup {
76*4882a593Smuzhiyun	status = "disabled";
77*4882a593Smuzhiyun};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun&mtl_tx_setup {
80*4882a593Smuzhiyun	status = "disabled";
81*4882a593Smuzhiyun};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun&nandc {
84*4882a593Smuzhiyun	status = "disabled";
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun&sdmmc {
88*4882a593Smuzhiyun	status = "disabled";
89*4882a593Smuzhiyun};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun&spi_nor {
92*4882a593Smuzhiyun	spi-max-frequency = <148500000>;
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&stmmac_axi_setup {
96*4882a593Smuzhiyun	status = "disabled";
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&rgmiim1_pins {
100*4882a593Smuzhiyun	status = "disabled";
101*4882a593Smuzhiyun};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&rng {
104*4882a593Smuzhiyun	status = "disabled";
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&uart2 {
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun};
110