1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun aliases { 9*4882a593Smuzhiyun mmc0 = &emmc; 10*4882a593Smuzhiyun mmc1 = &sdmmc; 11*4882a593Smuzhiyun }; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun chosen { 14*4882a593Smuzhiyun stdout-path = "serial2:115200n8"; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun}; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun&psci { 19*4882a593Smuzhiyun u-boot,dm-pre-reloc; 20*4882a593Smuzhiyun status = "okay"; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&uart2 { 24*4882a593Smuzhiyun clock-frequency = <24000000>; 25*4882a593Smuzhiyun u-boot,dm-pre-reloc; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&sdmmc { 29*4882a593Smuzhiyun u-boot,dm-pre-reloc; 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&emmc { 34*4882a593Smuzhiyun u-boot,dm-pre-reloc; 35*4882a593Smuzhiyun status = "okay"; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&nandc0 { 39*4882a593Smuzhiyun u-boot,dm-pre-reloc; 40*4882a593Smuzhiyun status = "okay"; 41*4882a593Smuzhiyun}; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun&service_msch { 44*4882a593Smuzhiyun u-boot,dm-pre-reloc; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&dmc { 48*4882a593Smuzhiyun u-boot,dm-pre-reloc; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&pmugrf { 52*4882a593Smuzhiyun u-boot,dm-pre-reloc; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&cru { 56*4882a593Smuzhiyun u-boot,dm-pre-reloc; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&crypto { 60*4882a593Smuzhiyun u-boot,dm-pre-reloc; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&grf { 64*4882a593Smuzhiyun u-boot,dm-pre-reloc; 65*4882a593Smuzhiyun}; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun&u2phy { 68*4882a593Smuzhiyun u-boot,dm-pre-reloc; 69*4882a593Smuzhiyun}; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun&u2phy_otg { 72*4882a593Smuzhiyun u-boot,dm-pre-reloc; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&usb_otg { 76*4882a593Smuzhiyun u-boot,dm-pre-reloc; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&gpio2 { 80*4882a593Smuzhiyun u-boot,dm-pre-reloc; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&saradc { 84*4882a593Smuzhiyun u-boot,dm-spl; 85*4882a593Smuzhiyun status = "okay"; 86*4882a593Smuzhiyun}; 87