1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ X11 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "rk3368-u-boot.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun chosen { 11*4882a593Smuzhiyun stdout-path = "serial4:115200n8"; 12*4882a593Smuzhiyun u-boot,spl-boot-order = &emmc; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun}; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun&dmc { 17*4882a593Smuzhiyun u-boot,dm-pre-reloc; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * PX5-evb(2GB) need to use CBRD mode, or else the dram is not correct 21*4882a593Smuzhiyun * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for 22*4882a593Smuzhiyun * details on the 'rockchip,memory-schedule' property and how it 23*4882a593Smuzhiyun * affects the physical-address to device-address mapping. 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun rockchip,memory-schedule = <DMC_MSCH_CBRD>; 26*4882a593Smuzhiyun rockchip,ddr-frequency = <800000000>; 27*4882a593Smuzhiyun rockchip,ddr-speed-bin = <DDR3_1600K>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun&pinctrl { 33*4882a593Smuzhiyun u-boot,dm-pre-reloc; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun&service_msch { 37*4882a593Smuzhiyun u-boot,dm-pre-reloc; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&dmc { 41*4882a593Smuzhiyun u-boot,dm-pre-reloc; 42*4882a593Smuzhiyun status = "okay"; 43*4882a593Smuzhiyun}; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun&pmugrf { 46*4882a593Smuzhiyun u-boot,dm-pre-reloc; 47*4882a593Smuzhiyun}; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun&sgrf { 50*4882a593Smuzhiyun u-boot,dm-pre-reloc; 51*4882a593Smuzhiyun}; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun&cru { 54*4882a593Smuzhiyun u-boot,dm-pre-reloc; 55*4882a593Smuzhiyun}; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun&grf { 58*4882a593Smuzhiyun u-boot,dm-pre-reloc; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&uart4 { 62*4882a593Smuzhiyun u-boot,dm-pre-reloc; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun&emmc { 66*4882a593Smuzhiyun u-boot,dm-pre-reloc; 67*4882a593Smuzhiyun}; 68