xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3308-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier:     GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "rk3308.dtsi"
9*4882a593Smuzhiyun#include "rk3308-u-boot.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun#include <linux/media-bus-format.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "Rockchip RK3308 EVB";
15*4882a593Smuzhiyun	compatible = "rockchip,rk3308-evb", "rockchip,rk3308";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	adc-keys0 {
18*4882a593Smuzhiyun		u-boot,dm-pre-reloc;
19*4882a593Smuzhiyun		compatible = "adc-keys";
20*4882a593Smuzhiyun		io-channels = <&saradc 0>;
21*4882a593Smuzhiyun		io-channel-names = "buttons";
22*4882a593Smuzhiyun		poll-interval = <100>;
23*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun		vol-up-key {
26*4882a593Smuzhiyun			u-boot,dm-pre-reloc;
27*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
28*4882a593Smuzhiyun			label = "volume up";
29*4882a593Smuzhiyun			press-threshold-microvolt = <18000>;
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	adc-keys1 {
34*4882a593Smuzhiyun		u-boot,dm-pre-reloc;
35*4882a593Smuzhiyun		compatible = "adc-keys";
36*4882a593Smuzhiyun		io-channels = <&saradc 1>;
37*4882a593Smuzhiyun		io-channel-names = "buttons";
38*4882a593Smuzhiyun		poll-interval = <100>;
39*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		esc-key {
42*4882a593Smuzhiyun			linux,code = <KEY_MUTE>;
43*4882a593Smuzhiyun			label = "mute";
44*4882a593Smuzhiyun			press-threshold-microvolt = <1130000>;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		home-key {
48*4882a593Smuzhiyun			linux,code = <KEY_MODE>;
49*4882a593Smuzhiyun			label = "mode";
50*4882a593Smuzhiyun			press-threshold-microvolt = <901000>;
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		menu-key {
54*4882a593Smuzhiyun			linux,code = <KEY_PLAY>;
55*4882a593Smuzhiyun			label = "play";
56*4882a593Smuzhiyun			press-threshold-microvolt = <624000>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		vol-down-key {
60*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEDOWN>;
61*4882a593Smuzhiyun			label = "volume down";
62*4882a593Smuzhiyun			press-threshold-microvolt = <300000>;
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		vol-up-key {
66*4882a593Smuzhiyun			u-boot,dm-pre-reloc;
67*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
68*4882a593Smuzhiyun			label = "volume up";
69*4882a593Smuzhiyun			press-threshold-microvolt = <18000>;
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	backlight: backlight {
74*4882a593Smuzhiyun		status = "disabled";
75*4882a593Smuzhiyun		compatible = "pwm-backlight";
76*4882a593Smuzhiyun		pwms = <&pwm1 0 25000 0>;
77*4882a593Smuzhiyun		brightness-levels = <
78*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
79*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
80*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
81*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
82*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
83*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
84*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
85*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
86*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
87*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
88*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
89*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
90*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
91*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
92*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
93*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
94*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
95*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
96*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
97*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
98*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
99*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
100*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
101*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
102*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
103*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
104*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
105*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
106*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
107*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
108*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
109*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
110*4882a593Smuzhiyun		default-brightness-level = <200>;
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	panel: panel {
114*4882a593Smuzhiyun		compatible = "simple-panel";
115*4882a593Smuzhiyun		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
116*4882a593Smuzhiyun		backlight = <&backlight>;
117*4882a593Smuzhiyun		/* enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; */
118*4882a593Smuzhiyun		enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
119*4882a593Smuzhiyun		enable-delay-ms = <20>;
120*4882a593Smuzhiyun		reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
121*4882a593Smuzhiyun		reset-value = <0>;
122*4882a593Smuzhiyun		reset-delay-ms = <10>;
123*4882a593Smuzhiyun		prepare-delay-ms = <20>;
124*4882a593Smuzhiyun		unprepare-delay-ms = <20>;
125*4882a593Smuzhiyun		disable-delay-ms = <20>;
126*4882a593Smuzhiyun		/* spi-sdo-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; */
127*4882a593Smuzhiyun		spi-sdi-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
128*4882a593Smuzhiyun		spi-scl-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
129*4882a593Smuzhiyun		spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
130*4882a593Smuzhiyun		width-mm = <217>;
131*4882a593Smuzhiyun		height-mm = <136>;
132*4882a593Smuzhiyun		rockchip,data-mapping = "vesa";
133*4882a593Smuzhiyun		rockchip,data-width = <18>;
134*4882a593Smuzhiyun		rockchip,output = "rgb";
135*4882a593Smuzhiyun		rgb-mode = "p666";
136*4882a593Smuzhiyun		status = "disabled";
137*4882a593Smuzhiyun		pinctrl-names = "default";
138*4882a593Smuzhiyun		pinctrl-0 = <&spi_init_cmd>;
139*4882a593Smuzhiyun		rockchip,cmd-type = "spi";
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun		/* type:0 is cmd, 1 is data */
142*4882a593Smuzhiyun		panel-init-sequence = [
143*4882a593Smuzhiyun			/* type delay num val1 val2 val3 */
144*4882a593Smuzhiyun			  00   00  01  e0
145*4882a593Smuzhiyun			  01   00  01  00
146*4882a593Smuzhiyun			  01   00  01  07
147*4882a593Smuzhiyun			  01   00  01  0f
148*4882a593Smuzhiyun			  01   00  01  0d
149*4882a593Smuzhiyun			  01   00  01  1b
150*4882a593Smuzhiyun			  01   00  01  0a
151*4882a593Smuzhiyun			  01   00  01  3c
152*4882a593Smuzhiyun			  01   00  01  78
153*4882a593Smuzhiyun			  01   00  01  4a
154*4882a593Smuzhiyun			  01   00  01  07
155*4882a593Smuzhiyun			  01   00  01  0e
156*4882a593Smuzhiyun			  01   00  01  09
157*4882a593Smuzhiyun			  01   00  01  1b
158*4882a593Smuzhiyun			  01   00  01  1e
159*4882a593Smuzhiyun			  01   00  01  0f
160*4882a593Smuzhiyun			  00   00  01  e1
161*4882a593Smuzhiyun			  01   00  01  00
162*4882a593Smuzhiyun			  01   00  01  22
163*4882a593Smuzhiyun			  01   00  01  24
164*4882a593Smuzhiyun			  01   00  01  06
165*4882a593Smuzhiyun			  01   00  01  12
166*4882a593Smuzhiyun			  01   00  01  07
167*4882a593Smuzhiyun			  01   00  01  36
168*4882a593Smuzhiyun			  01   00  01  47
169*4882a593Smuzhiyun			  01   00  01  47
170*4882a593Smuzhiyun			  01   00  01  06
171*4882a593Smuzhiyun			  01   00  01  0a
172*4882a593Smuzhiyun			  01   00  01  07
173*4882a593Smuzhiyun			  01   00  01  30
174*4882a593Smuzhiyun			  01   00  01  37
175*4882a593Smuzhiyun			  01   00  01  0f
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun			  00   00  01  c0
178*4882a593Smuzhiyun			  01   00  01  10
179*4882a593Smuzhiyun			  01   00  01  10
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun			  00   00  01  c1
182*4882a593Smuzhiyun			  01   00  01  41
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun			  00   00  01  c5
185*4882a593Smuzhiyun			  01   00  01  00
186*4882a593Smuzhiyun			  01   00  01  22
187*4882a593Smuzhiyun			  01   00  01  80
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun			  00   00  01  36
190*4882a593Smuzhiyun			  01   00  01  48
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun			  00   00  01  3a  /* interface mode control */
193*4882a593Smuzhiyun			  01   00  01  66
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun			  00   00  01  b0  /* interface mode control */
196*4882a593Smuzhiyun			  01   00  01  00
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun			  00   00  01  b1  /* frame rate 70hz */
199*4882a593Smuzhiyun			  01   00  01  b0
200*4882a593Smuzhiyun			  01   00  01  11
201*4882a593Smuzhiyun			  00   00  01  b4
202*4882a593Smuzhiyun			  01   00  01  02
203*4882a593Smuzhiyun			  00   00  01  B6  /* RGB/MCU Interface Control */
204*4882a593Smuzhiyun			  01   00  01  32  /* 02 mcu, 32 rgb */
205*4882a593Smuzhiyun			  01   00  01  02
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun			  00   00  01  b7
208*4882a593Smuzhiyun			  01   00  01  c6
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun			  00   00  01  be
211*4882a593Smuzhiyun			  01   00  01  00
212*4882a593Smuzhiyun			  01   00  01  04
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			  00   00  01  e9
215*4882a593Smuzhiyun			  01   00  01  00
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun			  00   00  01  f7
218*4882a593Smuzhiyun			  01   00  01  a9
219*4882a593Smuzhiyun			  01   00  01  51
220*4882a593Smuzhiyun			  01   00  01  2c
221*4882a593Smuzhiyun			  01   00  01  82
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun			  00   78  01  11
224*4882a593Smuzhiyun			  00   00  01  29
225*4882a593Smuzhiyun		];
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun		panel-exit-sequence = [
228*4882a593Smuzhiyun			/* type delay num val1 val2 val3 */
229*4882a593Smuzhiyun			00   0a  01  28
230*4882a593Smuzhiyun			00   78  01  10
231*4882a593Smuzhiyun		];
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun		display-timings {
234*4882a593Smuzhiyun			native-mode = <&kd050fwfba002_timing>;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun			kd050fwfba002_timing: timing0 {
237*4882a593Smuzhiyun				clock-frequency = <11000000>;
238*4882a593Smuzhiyun				hactive = <320>;
239*4882a593Smuzhiyun				vactive = <480>;
240*4882a593Smuzhiyun				hback-porch = <10>;
241*4882a593Smuzhiyun				hfront-porch = <4>;
242*4882a593Smuzhiyun				vback-porch = <10>;
243*4882a593Smuzhiyun				vfront-porch = <4>;
244*4882a593Smuzhiyun				hsync-len = <20>;
245*4882a593Smuzhiyun				vsync-len = <20>;
246*4882a593Smuzhiyun				hsync-active = <0>;
247*4882a593Smuzhiyun				vsync-active = <0>;
248*4882a593Smuzhiyun				de-active = <0>;
249*4882a593Smuzhiyun				pixelclk-active = <0>;
250*4882a593Smuzhiyun			};
251*4882a593Smuzhiyun		};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun		port {
254*4882a593Smuzhiyun			panel_in_rgb: endpoint {
255*4882a593Smuzhiyun				remote-endpoint = <&rgb_out_panel>;
256*4882a593Smuzhiyun			};
257*4882a593Smuzhiyun		};
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun	vbus_host: vbus-host-regulator {
261*4882a593Smuzhiyun		compatible = "regulator-fixed";
262*4882a593Smuzhiyun		enable-active-high;
263*4882a593Smuzhiyun		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
264*4882a593Smuzhiyun		pinctrl-names = "default";
265*4882a593Smuzhiyun		pinctrl-0 = <&usb_drv>;
266*4882a593Smuzhiyun		regulator-name = "vbus_host";
267*4882a593Smuzhiyun	};
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun	vdd_log: vdd_core: vdd-core {
270*4882a593Smuzhiyun		compatible = "pwm-regulator";
271*4882a593Smuzhiyun		pwms = <&pwm0 0 5000 1>;
272*4882a593Smuzhiyun		regulator-name = "vdd_core";
273*4882a593Smuzhiyun		regulator-min-microvolt = <847000>;
274*4882a593Smuzhiyun		regulator-max-microvolt = <1366000>;
275*4882a593Smuzhiyun		regulator-init-microvolt  = <1044000>;
276*4882a593Smuzhiyun		regulator-always-on;
277*4882a593Smuzhiyun		regulator-boot-on;
278*4882a593Smuzhiyun		status = "okay";
279*4882a593Smuzhiyun	};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
282*4882a593Smuzhiyun		compatible = "regulator-fixed";
283*4882a593Smuzhiyun		regulator-name = "vcc_phy";
284*4882a593Smuzhiyun		regulator-always-on;
285*4882a593Smuzhiyun		regulator-boot-on;
286*4882a593Smuzhiyun	};
287*4882a593Smuzhiyun};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun&display_subsystem {
290*4882a593Smuzhiyun	status = "disabled";
291*4882a593Smuzhiyun};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun&emmc {
294*4882a593Smuzhiyun	cap-mmc-highspeed;
295*4882a593Smuzhiyun	supports-emmc;
296*4882a593Smuzhiyun	non-removable;
297*4882a593Smuzhiyun	num-slots = <1>;
298*4882a593Smuzhiyun	status = "okay";
299*4882a593Smuzhiyun};
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun&mac {
302*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
303*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
304*4882a593Smuzhiyun	assigned-clock-parents = <&mac_clkin>;
305*4882a593Smuzhiyun	clock_in_out = "input";
306*4882a593Smuzhiyun	pinctrl-names = "default";
307*4882a593Smuzhiyun	pinctrl-0 = <&rmii_pins &mac_refclk>;
308*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
309*4882a593Smuzhiyun	snps,reset-active-low;
310*4882a593Smuzhiyun	snps,reset-delays-us = <0 50000 50000>;
311*4882a593Smuzhiyun	status = "disabled";
312*4882a593Smuzhiyun};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun&pwm0 {
315*4882a593Smuzhiyun	status = "okay";
316*4882a593Smuzhiyun};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun&pwm1 {
319*4882a593Smuzhiyun	status = "disabled";
320*4882a593Smuzhiyun};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun&sdmmc {
323*4882a593Smuzhiyun	bus-width = <4>;
324*4882a593Smuzhiyun	cap-mmc-highspeed;
325*4882a593Smuzhiyun	cap-sd-highspeed;
326*4882a593Smuzhiyun	supports-sd;
327*4882a593Smuzhiyun	card-detect-delay = <800>;
328*4882a593Smuzhiyun	ignore-pm-notify;
329*4882a593Smuzhiyun	sd-uhs-sdr12;
330*4882a593Smuzhiyun	sd-uhs-sdr25;
331*4882a593Smuzhiyun	sd-uhs-sdr50;
332*4882a593Smuzhiyun	sd-uhs-sdr104;
333*4882a593Smuzhiyun	status = "disabled";
334*4882a593Smuzhiyun};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun&u2phy {
337*4882a593Smuzhiyun	status = "okay";
338*4882a593Smuzhiyun};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun&u2phy_otg {
341*4882a593Smuzhiyun	status = "okay";
342*4882a593Smuzhiyun};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun&u2phy_host {
345*4882a593Smuzhiyun	status = "okay";
346*4882a593Smuzhiyun};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun&usb_host0_ehci {
349*4882a593Smuzhiyun	status = "okay";
350*4882a593Smuzhiyun};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun&usb_host0_ohci {
353*4882a593Smuzhiyun	status = "okay";
354*4882a593Smuzhiyun};
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun&usb20_otg {
357*4882a593Smuzhiyun	status = "okay";
358*4882a593Smuzhiyun};
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun&route_rgb {
361*4882a593Smuzhiyun	status = "disabled";
362*4882a593Smuzhiyun};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun&vop {
365*4882a593Smuzhiyun	status = "disabled";
366*4882a593Smuzhiyun};
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun&rgb {
369*4882a593Smuzhiyun	status = "disabled";
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun	ports {
372*4882a593Smuzhiyun		rgb_out: port@1 {
373*4882a593Smuzhiyun			reg = <1>;
374*4882a593Smuzhiyun			#address-cells = <1>;
375*4882a593Smuzhiyun			#size-cells = <0>;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun			rgb_out_panel: endpoint@0 {
378*4882a593Smuzhiyun				reg = <0>;
379*4882a593Smuzhiyun				remote-endpoint = <&panel_in_rgb>;
380*4882a593Smuzhiyun			};
381*4882a593Smuzhiyun		};
382*4882a593Smuzhiyun	};
383*4882a593Smuzhiyun};
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun&pinctrl {
386*4882a593Smuzhiyun	spi_panel {
387*4882a593Smuzhiyun		spi_init_cmd: spi-init-cmd {
388*4882a593Smuzhiyun			rockchip,pins =
389*4882a593Smuzhiyun				/* spi sdi */
390*4882a593Smuzhiyun				<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
391*4882a593Smuzhiyun				/* spi scl */
392*4882a593Smuzhiyun				<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
393*4882a593Smuzhiyun				/* spi cs */
394*4882a593Smuzhiyun				<1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
395*4882a593Smuzhiyun		};
396*4882a593Smuzhiyun	};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun	usb {
399*4882a593Smuzhiyun		usb_drv: usb-drv {
400*4882a593Smuzhiyun			rockchip,pins =
401*4882a593Smuzhiyun				<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
402*4882a593Smuzhiyun		};
403*4882a593Smuzhiyun	};
404*4882a593Smuzhiyun};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun&crypto {
407*4882a593Smuzhiyun	status = "okay";
408*4882a593Smuzhiyun};
409