1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Google Veyron Jerry Rev 3+ board device tree source 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2014 Google, Inc 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "rk3288-veyron-chromebook.dtsi" 11*4882a593Smuzhiyun#include "cros-ec-sbs.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Google Jerry"; 15*4882a593Smuzhiyun compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6", 16*4882a593Smuzhiyun "google,veyron-jerry-rev5", "google,veyron-jerry-rev4", 17*4882a593Smuzhiyun "google,veyron-jerry-rev3", "google,veyron-jerry", 18*4882a593Smuzhiyun "google,veyron", "rockchip,rk3288"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun stdout-path = &uart2; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun panel_regulator: panel-regulator { 25*4882a593Smuzhiyun compatible = "regulator-fixed"; 26*4882a593Smuzhiyun enable-active-high; 27*4882a593Smuzhiyun gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; 28*4882a593Smuzhiyun pinctrl-names = "default"; 29*4882a593Smuzhiyun pinctrl-0 = <&lcd_enable_h>; 30*4882a593Smuzhiyun regulator-name = "panel_regulator"; 31*4882a593Smuzhiyun vin-supply = <&vcc33_sys>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun vcc18_lcd: vcc18-lcd { 35*4882a593Smuzhiyun compatible = "regulator-fixed"; 36*4882a593Smuzhiyun enable-active-high; 37*4882a593Smuzhiyun gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; 38*4882a593Smuzhiyun pinctrl-names = "default"; 39*4882a593Smuzhiyun pinctrl-0 = <&avdd_1v8_disp_en>; 40*4882a593Smuzhiyun regulator-name = "vcc18_lcd"; 41*4882a593Smuzhiyun regulator-always-on; 42*4882a593Smuzhiyun regulator-boot-on; 43*4882a593Smuzhiyun vin-supply = <&vcc18_wl>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun backlight_regulator: backlight-regulator { 47*4882a593Smuzhiyun compatible = "regulator-fixed"; 48*4882a593Smuzhiyun enable-active-high; 49*4882a593Smuzhiyun gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>; 50*4882a593Smuzhiyun pinctrl-names = "default"; 51*4882a593Smuzhiyun pinctrl-0 = <&bl_pwr_en>; 52*4882a593Smuzhiyun regulator-name = "backlight_regulator"; 53*4882a593Smuzhiyun vin-supply = <&vcc33_sys>; 54*4882a593Smuzhiyun startup-delay-us = <15000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&dmc { 59*4882a593Smuzhiyun rockchip,pctl-timing = <0x29a 0xc8 0x1f4 0x42 0x4e 0x4 0xea 0xa 60*4882a593Smuzhiyun 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 61*4882a593Smuzhiyun 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 62*4882a593Smuzhiyun 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 63*4882a593Smuzhiyun 0x5 0x0>; 64*4882a593Smuzhiyun rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 65*4882a593Smuzhiyun 0xa60 0x40 0x10 0x0>; 66*4882a593Smuzhiyun rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&gpio_keys { 70*4882a593Smuzhiyun power { 71*4882a593Smuzhiyun gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&backlight { 76*4882a593Smuzhiyun power-supply = <&backlight_regulator>; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&panel { 80*4882a593Smuzhiyun power-supply= <&panel_regulator>; 81*4882a593Smuzhiyun}; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun&rk808 { 84*4882a593Smuzhiyun pinctrl-names = "default"; 85*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; 86*4882a593Smuzhiyun dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>, 87*4882a593Smuzhiyun <&gpio7 15 GPIO_ACTIVE_HIGH>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun regulators { 90*4882a593Smuzhiyun mic_vcc: LDO_REG2 { 91*4882a593Smuzhiyun regulator-always-on; 92*4882a593Smuzhiyun regulator-boot-on; 93*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 94*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 95*4882a593Smuzhiyun regulator-name = "mic_vcc"; 96*4882a593Smuzhiyun regulator-suspend-mem-disabled; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun}; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun&sdmmc { 102*4882a593Smuzhiyun pinctrl-names = "default"; 103*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio 104*4882a593Smuzhiyun &sdmmc_bus4>; 105*4882a593Smuzhiyun disable-wp; 106*4882a593Smuzhiyun}; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun&vcc_5v { 109*4882a593Smuzhiyun enable-active-high; 110*4882a593Smuzhiyun gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>; 111*4882a593Smuzhiyun pinctrl-names = "default"; 112*4882a593Smuzhiyun pinctrl-0 = <&drv_5v>; 113*4882a593Smuzhiyun}; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun&vcc50_hdmi { 116*4882a593Smuzhiyun enable-active-high; 117*4882a593Smuzhiyun gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>; 118*4882a593Smuzhiyun pinctrl-names = "default"; 119*4882a593Smuzhiyun pinctrl-0 = <&vcc50_hdmi_en>; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&edp { 123*4882a593Smuzhiyun pinctrl-names = "default"; 124*4882a593Smuzhiyun pinctrl-0 = <&edp_hpd>; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&pinctrl { 128*4882a593Smuzhiyun backlight { 129*4882a593Smuzhiyun bl_pwr_en: bl_pwr_en { 130*4882a593Smuzhiyun rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun buck-5v { 135*4882a593Smuzhiyun drv_5v: drv-5v { 136*4882a593Smuzhiyun rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun edp { 141*4882a593Smuzhiyun edp_hpd: edp_hpd { 142*4882a593Smuzhiyun rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun emmc { 147*4882a593Smuzhiyun /* Make sure eMMC is not in reset */ 148*4882a593Smuzhiyun emmc_deassert_reset: emmc-deassert-reset { 149*4882a593Smuzhiyun rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun hdmi { 154*4882a593Smuzhiyun vcc50_hdmi_en: vcc50-hdmi-en { 155*4882a593Smuzhiyun rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun lcd { 160*4882a593Smuzhiyun lcd_enable_h: lcd-en { 161*4882a593Smuzhiyun rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun avdd_1v8_disp_en: avdd-1v8-disp-en { 165*4882a593Smuzhiyun rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun pmic { 170*4882a593Smuzhiyun dvs_1: dvs-1 { 171*4882a593Smuzhiyun rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun dvs_2: dvs-2 { 175*4882a593Smuzhiyun rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&i2c4 { 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun /* 184*4882a593Smuzhiyun * Trackpad pin control is shared between Elan and Synaptics devices 185*4882a593Smuzhiyun * so we have to pull it up to the bus level. 186*4882a593Smuzhiyun */ 187*4882a593Smuzhiyun pinctrl-names = "default"; 188*4882a593Smuzhiyun pinctrl-0 = <&i2c4_xfer &trackpad_int>; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun trackpad@15 { 191*4882a593Smuzhiyun compatible = "elan,i2c_touchpad"; 192*4882a593Smuzhiyun interrupt-parent = <&gpio7>; 193*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 194*4882a593Smuzhiyun /* 195*4882a593Smuzhiyun * Remove the inherited pinctrl settings to avoid clashing 196*4882a593Smuzhiyun * with bus-wide ones. 197*4882a593Smuzhiyun */ 198*4882a593Smuzhiyun /delete-property/pinctrl-names; 199*4882a593Smuzhiyun /delete-property/pinctrl-0; 200*4882a593Smuzhiyun reg = <0x15>; 201*4882a593Smuzhiyun vcc-supply = <&vcc33_io>; 202*4882a593Smuzhiyun wakeup-source; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun trackpad@2c { 206*4882a593Smuzhiyun compatible = "hid-over-i2c"; 207*4882a593Smuzhiyun interrupt-parent = <&gpio7>; 208*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_EDGE_FALLING>; 209*4882a593Smuzhiyun reg = <0x2c>; 210*4882a593Smuzhiyun hid-descr-addr = <0x0020>; 211*4882a593Smuzhiyun vcc-supply = <&vcc33_io>; 212*4882a593Smuzhiyun wakeup-source; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun}; 215