xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3288-veyron-chromebook.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Google Veyron (and derivatives) board device tree source
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2014 Google, Inc
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/clock/rockchip,rk808.h>
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun#include "rk3288-veyron.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	aliases {
15*4882a593Smuzhiyun		i2c20 = &i2c_tunnel;
16*4882a593Smuzhiyun		video0 = &vopl;
17*4882a593Smuzhiyun		video1 = &vopb;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	gpio_keys: gpio-keys {
21*4882a593Smuzhiyun		pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
22*4882a593Smuzhiyun		lid {
23*4882a593Smuzhiyun			label = "Lid";
24*4882a593Smuzhiyun			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
25*4882a593Smuzhiyun			linux,code = <0>; /* SW_LID */
26*4882a593Smuzhiyun			linux,input-type = <5>; /* EV_SW */
27*4882a593Smuzhiyun			debounce-interval = <1>;
28*4882a593Smuzhiyun			gpio-key,wakeup;
29*4882a593Smuzhiyun                };
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	gpio-charger {
33*4882a593Smuzhiyun		compatible = "gpio-charger";
34*4882a593Smuzhiyun		gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
35*4882a593Smuzhiyun		pinctrl-names = "default";
36*4882a593Smuzhiyun		pinctrl-0 = <&ac_present_ap>;
37*4882a593Smuzhiyun		charger-type = "mains";
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	/* A non-regulated voltage from power supply or battery */
41*4882a593Smuzhiyun	vccsys: vccsys {
42*4882a593Smuzhiyun		compatible = "regulator-fixed";
43*4882a593Smuzhiyun		regulator-name = "vccsys";
44*4882a593Smuzhiyun		regulator-boot-on;
45*4882a593Smuzhiyun		regulator-always-on;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	vcc33_sys: vcc33-sys {
49*4882a593Smuzhiyun		vin-supply = <&vccsys>;
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	vcc_5v: vcc-5v {
53*4882a593Smuzhiyun		vin-supply = <&vccsys>;
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun	/* This turns on vbus for host1 (dwc2) */
57*4882a593Smuzhiyun	vcc5_host1: vcc5-host1-regulator {
58*4882a593Smuzhiyun		compatible = "regulator-fixed";
59*4882a593Smuzhiyun		enable-active-high;
60*4882a593Smuzhiyun		gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
61*4882a593Smuzhiyun		pinctrl-names = "default";
62*4882a593Smuzhiyun		pinctrl-0 = <&host1_pwr_en>;
63*4882a593Smuzhiyun		regulator-name = "vcc5_host1";
64*4882a593Smuzhiyun		regulator-always-on;
65*4882a593Smuzhiyun		regulator-boot-on;
66*4882a593Smuzhiyun	};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	/* This turns on vbus for otg for host mode (dwc2) */
69*4882a593Smuzhiyun	vcc5v_otg: vcc5v-otg-regulator {
70*4882a593Smuzhiyun		compatible = "regulator-fixed";
71*4882a593Smuzhiyun		enable-active-high;
72*4882a593Smuzhiyun		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
73*4882a593Smuzhiyun		pinctrl-names = "default";
74*4882a593Smuzhiyun		pinctrl-0 = <&usbotg_pwren_h>;
75*4882a593Smuzhiyun		regulator-name = "vcc5_host2";
76*4882a593Smuzhiyun		regulator-always-on;
77*4882a593Smuzhiyun		regulator-boot-on;
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&rk808 {
82*4882a593Smuzhiyun	regulators {
83*4882a593Smuzhiyun		vcc33_ccd: LDO_REG8 {
84*4882a593Smuzhiyun			regulator-always-on;
85*4882a593Smuzhiyun			regulator-boot-on;
86*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
87*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
88*4882a593Smuzhiyun			regulator-name = "vcc33_ccd";
89*4882a593Smuzhiyun			regulator-suspend-mem-disabled;
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&spi0 {
95*4882a593Smuzhiyun	status = "okay";
96*4882a593Smuzhiyun	spi-activate-delay = <100>;
97*4882a593Smuzhiyun	spi-max-frequency = <3000000>;
98*4882a593Smuzhiyun	spi-deactivate-delay = <200>;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	cros_ec: ec@0 {
101*4882a593Smuzhiyun		compatible = "google,cros-ec-spi";
102*4882a593Smuzhiyun		spi-max-frequency = <3000000>;
103*4882a593Smuzhiyun		interrupt-parent = <&gpio7>;
104*4882a593Smuzhiyun		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
105*4882a593Smuzhiyun		ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
106*4882a593Smuzhiyun		pinctrl-names = "default";
107*4882a593Smuzhiyun		pinctrl-0 = <&ec_int>;
108*4882a593Smuzhiyun		reg = <0>;
109*4882a593Smuzhiyun		google,cros-ec-spi-pre-delay = <30>;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		i2c_tunnel: i2c-tunnel {
112*4882a593Smuzhiyun			compatible = "google,cros-ec-i2c-tunnel";
113*4882a593Smuzhiyun			google,remote-bus = <0>;
114*4882a593Smuzhiyun			#address-cells = <1>;
115*4882a593Smuzhiyun			#size-cells = <0>;
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun	};
118*4882a593Smuzhiyun};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun&i2c4 {
121*4882a593Smuzhiyun	trackpad@15 {
122*4882a593Smuzhiyun		compatible = "elan,i2c_touchpad";
123*4882a593Smuzhiyun		interrupt-parent = <&gpio7>;
124*4882a593Smuzhiyun		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
125*4882a593Smuzhiyun		pinctrl-names = "default";
126*4882a593Smuzhiyun		pinctrl-0 = <&trackpad_int>;
127*4882a593Smuzhiyun		reg = <0x15>;
128*4882a593Smuzhiyun		vcc-supply = <&vcc33_io>;
129*4882a593Smuzhiyun		wakeup-source;
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun&pinctrl {
134*4882a593Smuzhiyun	pinctrl-0 = <
135*4882a593Smuzhiyun		/* Common for sleep and wake, but no owners */
136*4882a593Smuzhiyun		&ddr0_retention
137*4882a593Smuzhiyun		&ddrio_pwroff
138*4882a593Smuzhiyun		&global_pwroff
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		/* Wake only */
141*4882a593Smuzhiyun		&suspend_l_wake
142*4882a593Smuzhiyun		&bt_dev_wake_awake
143*4882a593Smuzhiyun	>;
144*4882a593Smuzhiyun	pinctrl-1 = <
145*4882a593Smuzhiyun		/* Common for sleep and wake, but no owners */
146*4882a593Smuzhiyun		&ddr0_retention
147*4882a593Smuzhiyun		&ddrio_pwroff
148*4882a593Smuzhiyun		&global_pwroff
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun		/* Sleep only */
151*4882a593Smuzhiyun		&suspend_l_sleep
152*4882a593Smuzhiyun		&bt_dev_wake_sleep
153*4882a593Smuzhiyun	>;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun	buttons {
156*4882a593Smuzhiyun		ap_lid_int_l: ap-lid-int-l {
157*4882a593Smuzhiyun			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
158*4882a593Smuzhiyun		};
159*4882a593Smuzhiyun	};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	charger {
162*4882a593Smuzhiyun		ac_present_ap: ac-present-ap {
163*4882a593Smuzhiyun			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
164*4882a593Smuzhiyun		};
165*4882a593Smuzhiyun	};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun	cros-ec {
168*4882a593Smuzhiyun		ec_int: ec-int {
169*4882a593Smuzhiyun			rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
170*4882a593Smuzhiyun		};
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	sdmmc {
174*4882a593Smuzhiyun		sdmmc_wp_gpio: sdmmc-wp-gpio {
175*4882a593Smuzhiyun			rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
176*4882a593Smuzhiyun		};
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun	suspend {
180*4882a593Smuzhiyun		suspend_l_wake: suspend-l-wake {
181*4882a593Smuzhiyun			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun		suspend_l_sleep: suspend-l-sleep {
185*4882a593Smuzhiyun			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
186*4882a593Smuzhiyun		};
187*4882a593Smuzhiyun	};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun	trackpad {
190*4882a593Smuzhiyun		trackpad_int: trackpad-int {
191*4882a593Smuzhiyun			rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	usb-host {
196*4882a593Smuzhiyun		host1_pwr_en: host1-pwr-en {
197*4882a593Smuzhiyun			rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
198*4882a593Smuzhiyun		};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		usbotg_pwren_h: usbotg-pwren-h {
201*4882a593Smuzhiyun			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun#include "cros-ec-keyboard.dtsi"
207