xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3288-u-boot.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun/* SPDX-License-Identifier:     GPL-2.0+ */
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/ {
7*4882a593Smuzhiyun	aliases {
8*4882a593Smuzhiyun		mmc0 = &emmc;
9*4882a593Smuzhiyun		mmc1 = &sdmmc;
10*4882a593Smuzhiyun	};
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun	chosen {
13*4882a593Smuzhiyun		stdout-path = &uart2;
14*4882a593Smuzhiyun		u-boot,spl-boot-order = &emmc, &sdmmc;
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun&psci {
19*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
20*4882a593Smuzhiyun	status = "okay";
21*4882a593Smuzhiyun};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun&uart2 {
24*4882a593Smuzhiyun	clock-frequency = <24000000>;
25*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
26*4882a593Smuzhiyun	status = "okay";
27*4882a593Smuzhiyun};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun&pmu {
30*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
31*4882a593Smuzhiyun};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun&sgrf {
34*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&grf {
38*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
39*4882a593Smuzhiyun};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun&crypto {
42*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&cru {
46*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
47*4882a593Smuzhiyun};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun&noc {
50*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
51*4882a593Smuzhiyun};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun&dmc {
54*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun&emmc {
58*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
59*4882a593Smuzhiyun};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun&sdmmc {
62*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
63*4882a593Smuzhiyun};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun&pinctrl {
66*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
67*4882a593Smuzhiyun};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun&gpio3 {
70*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
71*4882a593Smuzhiyun};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun&gpio8 {
74*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
75*4882a593Smuzhiyun};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun&gpio6 {
78*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&usbphy0 {
82*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
83*4882a593Smuzhiyun	status = "okay";
84*4882a593Smuzhiyun};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun&usbphy {
87*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&usb_otg {
91*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&saradc {
95*4882a593Smuzhiyun	u-boot,dm-spl;
96*4882a593Smuzhiyun	status = "okay";
97*4882a593Smuzhiyun};
98