xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3288-tinker.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
3*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
4*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
5*4882a593Smuzhiyun * whole.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
8*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
9*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
10*4882a593Smuzhiyun *     License, or (at your option) any later version.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15*4882a593Smuzhiyun *     GNU General Public License for more details.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * Or, alternatively,
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
20*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
21*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
22*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
23*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
24*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
25*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
26*4882a593Smuzhiyun *     conditions:
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
29*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun#include "rk3288.dtsi"
42*4882a593Smuzhiyun#include "rk3288-u-boot.dtsi"
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun/ {
45*4882a593Smuzhiyun	memory {
46*4882a593Smuzhiyun		device_type = "memory";
47*4882a593Smuzhiyun		reg = <0x0 0x80000000>;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	ext_gmac: external-gmac-clock {
51*4882a593Smuzhiyun		compatible = "fixed-clock";
52*4882a593Smuzhiyun		clock-frequency = <125000000>;
53*4882a593Smuzhiyun		clock-output-names = "ext_gmac";
54*4882a593Smuzhiyun		#clock-cells = <0>;
55*4882a593Smuzhiyun	};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	gpio-keys {
58*4882a593Smuzhiyun		compatible = "gpio-keys";
59*4882a593Smuzhiyun		#address-cells = <1>;
60*4882a593Smuzhiyun		#size-cells = <0>;
61*4882a593Smuzhiyun		autorepeat;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		pinctrl-names = "default";
64*4882a593Smuzhiyun		pinctrl-0 = <&pwrbtn>;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		button@0 {
67*4882a593Smuzhiyun			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
68*4882a593Smuzhiyun			label = "GPIO Key Power";
69*4882a593Smuzhiyun			linux,input-type = <1>;
70*4882a593Smuzhiyun			gpio-key,wakeup = <1>;
71*4882a593Smuzhiyun			debounce-interval = <100>;
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	gpio-leds {
76*4882a593Smuzhiyun		compatible = "gpio-leds";
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		pwr-led {
79*4882a593Smuzhiyun			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
80*4882a593Smuzhiyun			linux,default-trigger = "default-on";
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		act-led {
84*4882a593Smuzhiyun			gpios=<&gpio2 3 GPIO_ACTIVE_LOW>;
85*4882a593Smuzhiyun			linux,default-trigger="mmc0";
86*4882a593Smuzhiyun		};
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
90*4882a593Smuzhiyun		compatible = "regulator-fixed";
91*4882a593Smuzhiyun		regulator-name = "vcc_sys";
92*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
93*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
94*4882a593Smuzhiyun		regulator-always-on;
95*4882a593Smuzhiyun		regulator-boot-on;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	/*
99*4882a593Smuzhiyun	 * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from
100*4882a593Smuzhiyun	 * vcc_io directly.  Those boards won't be able to power cycle SD cards
101*4882a593Smuzhiyun	 * but it shouldn't hurt to toggle this pin there anyway.
102*4882a593Smuzhiyun	 */
103*4882a593Smuzhiyun	vcc_sd: sdmmc-regulator {
104*4882a593Smuzhiyun		compatible = "regulator-fixed";
105*4882a593Smuzhiyun		gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
106*4882a593Smuzhiyun		pinctrl-names = "default";
107*4882a593Smuzhiyun		pinctrl-0 = <&sdmmc_pwr>;
108*4882a593Smuzhiyun		regulator-name = "vcc_sd";
109*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
110*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
111*4882a593Smuzhiyun		startup-delay-us = <100000>;
112*4882a593Smuzhiyun		vin-supply = <&vcc_io>;
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	vcc5v0_host: usb-host-regulator {
116*4882a593Smuzhiyun		compatible = "regulator-fixed";
117*4882a593Smuzhiyun		enable-active-high;
118*4882a593Smuzhiyun		gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
119*4882a593Smuzhiyun		pinctrl-names = "default";
120*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
121*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
122*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
123*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
124*4882a593Smuzhiyun		regulator-always-on;
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&cpu0 {
129*4882a593Smuzhiyun	cpu0-supply = <&vdd_cpu>;
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&sdmmc {
133*4882a593Smuzhiyun	bus-width = <4>;
134*4882a593Smuzhiyun	cap-mmc-highspeed;
135*4882a593Smuzhiyun	cap-sd-highspeed;
136*4882a593Smuzhiyun	card-detect-delay = <200>;
137*4882a593Smuzhiyun	disable-wp;			/* wp not hooked up */
138*4882a593Smuzhiyun	num-slots = <1>;
139*4882a593Smuzhiyun	pinctrl-names = "default";
140*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun	supports-sd;
143*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
144*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
145*4882a593Smuzhiyun};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun&gpu {
148*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&gmac {
153*4882a593Smuzhiyun	phy-supply = <&vcc33_lan>;
154*4882a593Smuzhiyun	phy-mode = "rgmii";
155*4882a593Smuzhiyun	clock_in_out = "input";
156*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 7 0>;
157*4882a593Smuzhiyun	snps,reset-active-low;
158*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 1000000>;
159*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
160*4882a593Smuzhiyun	assigned-clock-parents = <&ext_gmac>;
161*4882a593Smuzhiyun	pinctrl-names = "default";
162*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
163*4882a593Smuzhiyun	tx_delay = <0x30>;
164*4882a593Smuzhiyun	rx_delay = <0x10>;
165*4882a593Smuzhiyun	status = "okay";
166*4882a593Smuzhiyun};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun&hdmi {
169*4882a593Smuzhiyun	ddc-i2c-bus = <&i2c5>;
170*4882a593Smuzhiyun	status = "okay";
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&i2c0 {
174*4882a593Smuzhiyun	status = "okay";
175*4882a593Smuzhiyun	clock-frequency = <400000>;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun	rk808: pmic@1b {
178*4882a593Smuzhiyun		compatible = "rockchip,rk808";
179*4882a593Smuzhiyun		reg = <0x1b>;
180*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
181*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
182*4882a593Smuzhiyun		pinctrl-names = "default";
183*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int &global_pwroff>;
184*4882a593Smuzhiyun		rockchip,system-power-controller;
185*4882a593Smuzhiyun		wakeup-source;
186*4882a593Smuzhiyun		#clock-cells = <1>;
187*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
190*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
191*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
192*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
193*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
194*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
195*4882a593Smuzhiyun		vcc8-supply = <&vcc_18>;
196*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
197*4882a593Smuzhiyun		vcc10-supply = <&vcc_io>;
198*4882a593Smuzhiyun		vcc11-supply = <&vcc_sys>;
199*4882a593Smuzhiyun		vcc12-supply = <&vcc_io>;
200*4882a593Smuzhiyun		vddio-supply = <&vcc18_ldo1>;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun		regulators {
203*4882a593Smuzhiyun			vdd_cpu: DCDC_REG1 {
204*4882a593Smuzhiyun				regulator-always-on;
205*4882a593Smuzhiyun				regulator-boot-on;
206*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
207*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
208*4882a593Smuzhiyun				regulator-name = "vdd_arm";
209*4882a593Smuzhiyun				regulator-state-mem {
210*4882a593Smuzhiyun					regulator-off-in-suspend;
211*4882a593Smuzhiyun				};
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
215*4882a593Smuzhiyun				regulator-always-on;
216*4882a593Smuzhiyun				regulator-boot-on;
217*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
218*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
219*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
220*4882a593Smuzhiyun				regulator-state-mem {
221*4882a593Smuzhiyun					regulator-on-in-suspend;
222*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
223*4882a593Smuzhiyun				};
224*4882a593Smuzhiyun			};
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
227*4882a593Smuzhiyun				regulator-always-on;
228*4882a593Smuzhiyun				regulator-boot-on;
229*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
230*4882a593Smuzhiyun				regulator-state-mem {
231*4882a593Smuzhiyun					regulator-on-in-suspend;
232*4882a593Smuzhiyun				};
233*4882a593Smuzhiyun			};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
236*4882a593Smuzhiyun				regulator-always-on;
237*4882a593Smuzhiyun				regulator-boot-on;
238*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
239*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
240*4882a593Smuzhiyun				regulator-name = "vcc_io";
241*4882a593Smuzhiyun				regulator-state-mem {
242*4882a593Smuzhiyun					regulator-on-in-suspend;
243*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
244*4882a593Smuzhiyun				};
245*4882a593Smuzhiyun			};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun			vcc18_ldo1: LDO_REG1 {
248*4882a593Smuzhiyun				regulator-always-on;
249*4882a593Smuzhiyun				regulator-boot-on;
250*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
251*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
252*4882a593Smuzhiyun				regulator-name = "vcc18_ldo1";
253*4882a593Smuzhiyun				regulator-state-mem {
254*4882a593Smuzhiyun					regulator-on-in-suspend;
255*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
256*4882a593Smuzhiyun				};
257*4882a593Smuzhiyun			};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun			vcc33_mipi: LDO_REG2 {
260*4882a593Smuzhiyun				regulator-always-on;
261*4882a593Smuzhiyun				regulator-boot-on;
262*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
263*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
264*4882a593Smuzhiyun				regulator-name = "vcc33_mipi";
265*4882a593Smuzhiyun				regulator-state-mem {
266*4882a593Smuzhiyun					regulator-off-in-suspend;
267*4882a593Smuzhiyun				};
268*4882a593Smuzhiyun			};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
271*4882a593Smuzhiyun				regulator-always-on;
272*4882a593Smuzhiyun				regulator-boot-on;
273*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
274*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
275*4882a593Smuzhiyun				regulator-name = "vdd_10";
276*4882a593Smuzhiyun				regulator-state-mem {
277*4882a593Smuzhiyun					regulator-on-in-suspend;
278*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
279*4882a593Smuzhiyun				};
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun			vcc18_codec: LDO_REG4 {
283*4882a593Smuzhiyun				regulator-always-on;
284*4882a593Smuzhiyun				regulator-boot-on;
285*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
286*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
287*4882a593Smuzhiyun				regulator-name = "vcc18_codec";
288*4882a593Smuzhiyun				regulator-state-mem {
289*4882a593Smuzhiyun					regulator-on-in-suspend;
290*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
291*4882a593Smuzhiyun				};
292*4882a593Smuzhiyun			};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
295*4882a593Smuzhiyun				regulator-always-on;
296*4882a593Smuzhiyun				regulator-boot-on;
297*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
298*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
299*4882a593Smuzhiyun				regulator-name = "vccio_sd";
300*4882a593Smuzhiyun				regulator-state-mem {
301*4882a593Smuzhiyun					regulator-on-in-suspend;
302*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
303*4882a593Smuzhiyun				};
304*4882a593Smuzhiyun			};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
307*4882a593Smuzhiyun				regulator-always-on;
308*4882a593Smuzhiyun				regulator-boot-on;
309*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
310*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
311*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
312*4882a593Smuzhiyun				regulator-state-mem {
313*4882a593Smuzhiyun					regulator-on-in-suspend;
314*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
315*4882a593Smuzhiyun				};
316*4882a593Smuzhiyun			};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
319*4882a593Smuzhiyun				regulator-always-on;
320*4882a593Smuzhiyun				regulator-boot-on;
321*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
322*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
323*4882a593Smuzhiyun				regulator-name = "vcc_18";
324*4882a593Smuzhiyun				regulator-state-mem {
325*4882a593Smuzhiyun					regulator-on-in-suspend;
326*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
327*4882a593Smuzhiyun				};
328*4882a593Smuzhiyun			};
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun			vcc18_lcd: LDO_REG8 {
331*4882a593Smuzhiyun				regulator-always-on;
332*4882a593Smuzhiyun				regulator-boot-on;
333*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
334*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
335*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
336*4882a593Smuzhiyun				regulator-state-mem {
337*4882a593Smuzhiyun					regulator-on-in-suspend;
338*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
339*4882a593Smuzhiyun				};
340*4882a593Smuzhiyun			};
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun			vcc33_sd: SWITCH_REG1 {
343*4882a593Smuzhiyun				regulator-always-on;
344*4882a593Smuzhiyun				regulator-boot-on;
345*4882a593Smuzhiyun				regulator-name = "vcc33_sd";
346*4882a593Smuzhiyun				regulator-state-mem {
347*4882a593Smuzhiyun					regulator-on-in-suspend;
348*4882a593Smuzhiyun				};
349*4882a593Smuzhiyun			};
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun			vcc33_lan: SWITCH_REG2 {
352*4882a593Smuzhiyun				regulator-always-on;
353*4882a593Smuzhiyun				regulator-boot-on;
354*4882a593Smuzhiyun				regulator-name = "vcc33_lan";
355*4882a593Smuzhiyun				regulator-state-mem {
356*4882a593Smuzhiyun					regulator-on-in-suspend;
357*4882a593Smuzhiyun				};
358*4882a593Smuzhiyun			};
359*4882a593Smuzhiyun		};
360*4882a593Smuzhiyun	};
361*4882a593Smuzhiyun};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun&i2c2 {
364*4882a593Smuzhiyun	status = "okay";
365*4882a593Smuzhiyun	headset: nau8825@1a {
366*4882a593Smuzhiyun		compatible = "nuvoton,nau8825";
367*4882a593Smuzhiyun		#sound-dai-cells = <0>;
368*4882a593Smuzhiyun		reg = <0x1a>;
369*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
370*4882a593Smuzhiyun		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
371*4882a593Smuzhiyun		nuvoton,jkdet-enable = <1>;
372*4882a593Smuzhiyun		nuvoton,jkdet-pull-enable = <1>;
373*4882a593Smuzhiyun		nuvoton,jkdet-pull-up = <0>;
374*4882a593Smuzhiyun		nuvoton,jkdet-polarity = <1>;
375*4882a593Smuzhiyun		nuvoton,vref-impedance = <2>;
376*4882a593Smuzhiyun		nuvoton,micbias-voltage = <6>;
377*4882a593Smuzhiyun		nuvoton,sar-threshold-num = <4>;
378*4882a593Smuzhiyun		nuvoton,sar-threshold = <0xa 0x14 0x26 0x73>;
379*4882a593Smuzhiyun		nuvoton,sar-hysteresis = <0>;
380*4882a593Smuzhiyun		nuvoton,sar-voltage = <6>;
381*4882a593Smuzhiyun		nuvoton,sar-compare-time = <0>;
382*4882a593Smuzhiyun		nuvoton,sar-sampling-time = <0>;
383*4882a593Smuzhiyun		nuvoton,short-key-debounce = <3>;
384*4882a593Smuzhiyun		nuvoton,jack-insert-debounce = <7>;
385*4882a593Smuzhiyun		nuvoton,jack-eject-debounce = <7>;
386*4882a593Smuzhiyun		clock-names = "mclk";
387*4882a593Smuzhiyun		clocks = <&cru SCLK_I2S0_OUT>;
388*4882a593Smuzhiyun	};
389*4882a593Smuzhiyun};
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun&i2c5 {
392*4882a593Smuzhiyun	status = "okay";
393*4882a593Smuzhiyun};
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun&wdt {
396*4882a593Smuzhiyun	status = "okay";
397*4882a593Smuzhiyun};
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun&pwm0 {
400*4882a593Smuzhiyun	status = "okay";
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&saradc {
404*4882a593Smuzhiyun	vref-supply = <&vcc18_ldo1>;
405*4882a593Smuzhiyun	status ="okay";
406*4882a593Smuzhiyun};
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun&uart0 {
409*4882a593Smuzhiyun	status = "okay";
410*4882a593Smuzhiyun};
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun&uart1 {
413*4882a593Smuzhiyun	status = "okay";
414*4882a593Smuzhiyun};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun&uart2 {
417*4882a593Smuzhiyun	status = "okay";
418*4882a593Smuzhiyun};
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun&uart3 {
421*4882a593Smuzhiyun	status = "okay";
422*4882a593Smuzhiyun};
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun&uart4 {
425*4882a593Smuzhiyun	status = "okay";
426*4882a593Smuzhiyun};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun&tsadc {
429*4882a593Smuzhiyun	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
430*4882a593Smuzhiyun	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
431*4882a593Smuzhiyun	status = "okay";
432*4882a593Smuzhiyun};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun&usbphy {
435*4882a593Smuzhiyun	status = "okay";
436*4882a593Smuzhiyun};
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun&usb_host0_ehci {
439*4882a593Smuzhiyun	status = "okay";
440*4882a593Smuzhiyun};
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun&usb_host1 {
443*4882a593Smuzhiyun	status = "okay";
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&usb_otg {
447*4882a593Smuzhiyun	status= "okay";
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&vopb {
451*4882a593Smuzhiyun	status = "okay";
452*4882a593Smuzhiyun};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun&vopb_mmu {
455*4882a593Smuzhiyun	status = "okay";
456*4882a593Smuzhiyun};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun&vopl {
459*4882a593Smuzhiyun	status = "okay";
460*4882a593Smuzhiyun};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun&vopl_mmu {
463*4882a593Smuzhiyun	status = "okay";
464*4882a593Smuzhiyun};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun&pinctrl {
467*4882a593Smuzhiyun	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
468*4882a593Smuzhiyun		drive-strength = <8>;
469*4882a593Smuzhiyun	};
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
472*4882a593Smuzhiyun		bias-pull-up;
473*4882a593Smuzhiyun		drive-strength = <8>;
474*4882a593Smuzhiyun	};
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun	backlight {
477*4882a593Smuzhiyun		bl_en: bl-en {
478*4882a593Smuzhiyun			rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
479*4882a593Smuzhiyun		};
480*4882a593Smuzhiyun	};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun	buttons {
483*4882a593Smuzhiyun		pwrbtn: pwrbtn {
484*4882a593Smuzhiyun			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
485*4882a593Smuzhiyun		};
486*4882a593Smuzhiyun	};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun	eth_phy {
489*4882a593Smuzhiyun		eth_phy_pwr: eth-phy-pwr {
490*4882a593Smuzhiyun			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
491*4882a593Smuzhiyun		};
492*4882a593Smuzhiyun	};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun	pmic {
495*4882a593Smuzhiyun		pmic_int: pmic-int {
496*4882a593Smuzhiyun			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
497*4882a593Smuzhiyun		};
498*4882a593Smuzhiyun	};
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun	sdmmc {
501*4882a593Smuzhiyun		/*
502*4882a593Smuzhiyun		 * Default drive strength isn't enough to achieve even
503*4882a593Smuzhiyun		 * high-speed mode on EVB board so bump up to 8ma.
504*4882a593Smuzhiyun		 */
505*4882a593Smuzhiyun		sdmmc_bus4: sdmmc-bus4 {
506*4882a593Smuzhiyun			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
507*4882a593Smuzhiyun					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
508*4882a593Smuzhiyun					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
509*4882a593Smuzhiyun					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
510*4882a593Smuzhiyun		};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun		sdmmc_clk: sdmmc-clk {
513*4882a593Smuzhiyun			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
514*4882a593Smuzhiyun		};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun		sdmmc_cmd: sdmmc-cmd {
517*4882a593Smuzhiyun			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
518*4882a593Smuzhiyun		};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun		sdmmc_pwr: sdmmc-pwr {
521*4882a593Smuzhiyun			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
522*4882a593Smuzhiyun		};
523*4882a593Smuzhiyun	};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	usb {
526*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
527*4882a593Smuzhiyun			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
528*4882a593Smuzhiyun		};
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun		pwr_3g: pwr-3g {
531*4882a593Smuzhiyun			rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
532*4882a593Smuzhiyun		};
533*4882a593Smuzhiyun	};
534*4882a593Smuzhiyun};
535