1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ X11 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "rk3288-firefly.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Firefly-RK3288"; 12*4882a593Smuzhiyun compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun chosen { 15*4882a593Smuzhiyun stdout-path = &uart2; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun config { 19*4882a593Smuzhiyun u-boot,dm-pre-reloc; 20*4882a593Smuzhiyun u-boot,boot-led = "firefly:green:power"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&dmc { 25*4882a593Smuzhiyun rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa 26*4882a593Smuzhiyun 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 27*4882a593Smuzhiyun 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 28*4882a593Smuzhiyun 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 29*4882a593Smuzhiyun 0x5 0x0>; 30*4882a593Smuzhiyun rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 31*4882a593Smuzhiyun 0xa60 0x40 0x10 0x0>; 32*4882a593Smuzhiyun /* Add a dummy value to cause of-platdata think this is bytes */ 33*4882a593Smuzhiyun rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun&ir { 37*4882a593Smuzhiyun gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&pinctrl { 41*4882a593Smuzhiyun u-boot,dm-pre-reloc; 42*4882a593Smuzhiyun act8846 { 43*4882a593Smuzhiyun pmic_vsel: pmic-vsel { 44*4882a593Smuzhiyun rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun ir { 49*4882a593Smuzhiyun ir_int: ir-int { 50*4882a593Smuzhiyun rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun usb_host { 54*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 55*4882a593Smuzhiyun rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun}; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun&pwm1 { 61*4882a593Smuzhiyun status = "okay"; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&uart2 { 65*4882a593Smuzhiyun u-boot,dm-pre-reloc; 66*4882a593Smuzhiyun reg-shift = <2>; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&usb_host1 { 70*4882a593Smuzhiyun vbus-supply = <&vcc_host_5v>; 71*4882a593Smuzhiyun status = "okay"; 72*4882a593Smuzhiyun}; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun&sdmmc { 75*4882a593Smuzhiyun u-boot,dm-pre-reloc; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun&gpio3 { 79*4882a593Smuzhiyun u-boot,dm-pre-reloc; 80*4882a593Smuzhiyun}; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun&gpio8 { 83*4882a593Smuzhiyun u-boot,dm-pre-reloc; 84*4882a593Smuzhiyun}; 85