xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3288-fennec.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
3*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
4*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
5*4882a593Smuzhiyun * whole.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun *  a) This file is free software; you can redistribute it and/or
8*4882a593Smuzhiyun *     modify it under the terms of the GNU General Public License as
9*4882a593Smuzhiyun *     published by the Free Software Foundation; either version 2 of the
10*4882a593Smuzhiyun *     License, or (at your option) any later version.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun *     This file is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun *     but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15*4882a593Smuzhiyun *     GNU General Public License for more details.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * Or, alternatively,
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
20*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
21*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
22*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
23*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
24*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
25*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
26*4882a593Smuzhiyun *     conditions:
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
29*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun#include "rk3288.dtsi"
42*4882a593Smuzhiyun#include "rk3288-u-boot.dtsi"
43*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun/ {
46*4882a593Smuzhiyun	memory {
47*4882a593Smuzhiyun		reg = <0x0 0x80000000>;
48*4882a593Smuzhiyun		device_type = "memory";
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	adc-keys {
52*4882a593Smuzhiyun		compatible = "adc-keys";
53*4882a593Smuzhiyun		io-channels = <&saradc 1>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		volup-key {
56*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
57*4882a593Smuzhiyun			label = "volume up";
58*4882a593Smuzhiyun			press-threshold-microvolt = <18000>;
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	ext_gmac: external-gmac-clock {
63*4882a593Smuzhiyun		compatible = "fixed-clock";
64*4882a593Smuzhiyun		#clock-cells = <0>;
65*4882a593Smuzhiyun		clock-frequency = <125000000>;
66*4882a593Smuzhiyun		clock-output-names = "ext_gmac";
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	vcc_sys: vsys-regulator {
70*4882a593Smuzhiyun		compatible = "regulator-fixed";
71*4882a593Smuzhiyun		regulator-name = "vcc_sys";
72*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
73*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
74*4882a593Smuzhiyun		regulator-always-on;
75*4882a593Smuzhiyun		regulator-boot-on;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	backlight: backlight {
79*4882a593Smuzhiyun		compatible = "pwm-backlight";
80*4882a593Smuzhiyun		power-supply = <&vcc_sys>;
81*4882a593Smuzhiyun		enable-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
82*4882a593Smuzhiyun		brightness-levels = <
83*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
84*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
85*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
86*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
87*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
88*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
89*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
90*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
91*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
92*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
93*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
94*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
95*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
96*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
97*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
98*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
99*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
100*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
101*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
102*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
103*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
104*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
105*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
106*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
107*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
108*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
109*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
110*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
111*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
112*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
113*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
114*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
115*4882a593Smuzhiyun		default-brightness-level = <50>;
116*4882a593Smuzhiyun		pwms = <&pwm0 0 25000 0>;
117*4882a593Smuzhiyun		pinctrl-names = "default";
118*4882a593Smuzhiyun		pinctrl-0 = <&pwm0_pin>;
119*4882a593Smuzhiyun		pwm-delay-us = <10000>;
120*4882a593Smuzhiyun		status = "okay";
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	edp_panel: edp-panel {
124*4882a593Smuzhiyun		compatible ="lg,lp079qx1-sp0v", "simple-panel";
125*4882a593Smuzhiyun		backlight = <&backlight>;
126*4882a593Smuzhiyun		power-supply = <&vcc_io>;
127*4882a593Smuzhiyun		enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
128*4882a593Smuzhiyun		prepare-delay-ms = <20>;
129*4882a593Smuzhiyun		enable-delay-ms = <20>;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		ports {
132*4882a593Smuzhiyun			panel_in: endpoint {
133*4882a593Smuzhiyun				remote-endpoint = <&edp_out>;
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun		};
136*4882a593Smuzhiyun	};
137*4882a593Smuzhiyun};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun&cpu0 {
140*4882a593Smuzhiyun	cpu0-supply = <&vdd_cpu>;
141*4882a593Smuzhiyun};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun&display_subsystem {
144*4882a593Smuzhiyun	status = "okay";
145*4882a593Smuzhiyun};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun&edp {
148*4882a593Smuzhiyun	status = "okay";
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	ports {
151*4882a593Smuzhiyun		port@1 {
152*4882a593Smuzhiyun			reg = <1>;
153*4882a593Smuzhiyun			edp_out: endpoint {
154*4882a593Smuzhiyun				remote-endpoint = <&panel_in>;
155*4882a593Smuzhiyun			};
156*4882a593Smuzhiyun		};
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun&emmc {
161*4882a593Smuzhiyun	bus-width = <8>;
162*4882a593Smuzhiyun	cap-mmc-highspeed;
163*4882a593Smuzhiyun	disable-wp;
164*4882a593Smuzhiyun	non-removable;
165*4882a593Smuzhiyun	num-slots = <1>;
166*4882a593Smuzhiyun	pinctrl-names = "default";
167*4882a593Smuzhiyun	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
168*4882a593Smuzhiyun	status = "okay";
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun&pwm0 {
172*4882a593Smuzhiyun	status = "okay";
173*4882a593Smuzhiyun};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun&route_edp {
176*4882a593Smuzhiyun	status = "okay";
177*4882a593Smuzhiyun};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun&saradc {
180*4882a593Smuzhiyun	vref-supply = <&vcc_18>;
181*4882a593Smuzhiyun	status = "okay";
182*4882a593Smuzhiyun};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun&sdmmc {
185*4882a593Smuzhiyun	bus-width = <4>;
186*4882a593Smuzhiyun	cap-mmc-highspeed;
187*4882a593Smuzhiyun	cap-sd-highspeed;
188*4882a593Smuzhiyun	card-detect-delay = <200>;
189*4882a593Smuzhiyun	disable-wp;
190*4882a593Smuzhiyun	num-slots = <1>;
191*4882a593Smuzhiyun	pinctrl-names = "default";
192*4882a593Smuzhiyun	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
193*4882a593Smuzhiyun	status = "okay";
194*4882a593Smuzhiyun	vmmc-supply = <&vcc_sd>;
195*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&gmac {
199*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_MAC>;
200*4882a593Smuzhiyun	assigned-clock-parents = <&ext_gmac>;
201*4882a593Smuzhiyun	clock_in_out = "input";
202*4882a593Smuzhiyun	pinctrl-names = "default";
203*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
204*4882a593Smuzhiyun	phy-supply = <&vcc_lan>;
205*4882a593Smuzhiyun	phy-mode = "rgmii";
206*4882a593Smuzhiyun	snps,reset-active-low;
207*4882a593Smuzhiyun	snps,reset-delays-us = <0 10000 1000000>;
208*4882a593Smuzhiyun	snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
209*4882a593Smuzhiyun	tx_delay = <0x30>;
210*4882a593Smuzhiyun	rx_delay = <0x10>;
211*4882a593Smuzhiyun	status = "okay";
212*4882a593Smuzhiyun};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun&gpu {
215*4882a593Smuzhiyun	mali-supply = <&vdd_gpu>;
216*4882a593Smuzhiyun	status = "okay";
217*4882a593Smuzhiyun};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun&hdmi {
220*4882a593Smuzhiyun	status = "okay";
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&i2c0 {
224*4882a593Smuzhiyun	status = "okay";
225*4882a593Smuzhiyun	clock-frequency = <400000>;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun	rk808: pmic@1b {
228*4882a593Smuzhiyun		compatible = "rockchip,rk808";
229*4882a593Smuzhiyun		reg = <0x1b>;
230*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
231*4882a593Smuzhiyun		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
232*4882a593Smuzhiyun		#clock-cells = <1>;
233*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk808-clkout2";
234*4882a593Smuzhiyun		pinctrl-names = "default";
235*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int &global_pwroff>;
236*4882a593Smuzhiyun		rockchip,system-power-controller;
237*4882a593Smuzhiyun		wakeup-source;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun		vcc1-supply = <&vcc_sys>;
240*4882a593Smuzhiyun		vcc2-supply = <&vcc_sys>;
241*4882a593Smuzhiyun		vcc3-supply = <&vcc_sys>;
242*4882a593Smuzhiyun		vcc4-supply = <&vcc_sys>;
243*4882a593Smuzhiyun		vcc6-supply = <&vcc_sys>;
244*4882a593Smuzhiyun		vcc7-supply = <&vcc_sys>;
245*4882a593Smuzhiyun		vcc8-supply = <&vcc_io>;
246*4882a593Smuzhiyun		vcc9-supply = <&vcc_io>;
247*4882a593Smuzhiyun		vcc10-supply = <&vcc_io>;
248*4882a593Smuzhiyun		vcc11-supply = <&vcc_io>;
249*4882a593Smuzhiyun		vcc12-supply = <&vcc_io>;
250*4882a593Smuzhiyun		vddio-supply = <&vcc_io>;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		regulators {
253*4882a593Smuzhiyun			vdd_cpu: DCDC_REG1 {
254*4882a593Smuzhiyun				regulator-always-on;
255*4882a593Smuzhiyun				regulator-boot-on;
256*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
257*4882a593Smuzhiyun				regulator-max-microvolt = <1350000>;
258*4882a593Smuzhiyun				regulator-name = "vdd_arm";
259*4882a593Smuzhiyun				regulator-state-mem {
260*4882a593Smuzhiyun					regulator-off-in-suspend;
261*4882a593Smuzhiyun				};
262*4882a593Smuzhiyun			};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun			vdd_gpu: DCDC_REG2 {
265*4882a593Smuzhiyun				regulator-always-on;
266*4882a593Smuzhiyun				regulator-boot-on;
267*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
268*4882a593Smuzhiyun				regulator-max-microvolt = <1250000>;
269*4882a593Smuzhiyun				regulator-name = "vdd_gpu";
270*4882a593Smuzhiyun				regulator-state-mem {
271*4882a593Smuzhiyun					regulator-on-in-suspend;
272*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
273*4882a593Smuzhiyun				};
274*4882a593Smuzhiyun			};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun			vcc_ddr: DCDC_REG3 {
277*4882a593Smuzhiyun				regulator-always-on;
278*4882a593Smuzhiyun				regulator-boot-on;
279*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
280*4882a593Smuzhiyun				regulator-state-mem {
281*4882a593Smuzhiyun					regulator-on-in-suspend;
282*4882a593Smuzhiyun				};
283*4882a593Smuzhiyun			};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun			vcc_io: DCDC_REG4 {
286*4882a593Smuzhiyun				regulator-always-on;
287*4882a593Smuzhiyun				regulator-boot-on;
288*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
289*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
290*4882a593Smuzhiyun				regulator-name = "vcc_io";
291*4882a593Smuzhiyun				regulator-state-mem {
292*4882a593Smuzhiyun					regulator-on-in-suspend;
293*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
294*4882a593Smuzhiyun				};
295*4882a593Smuzhiyun			};
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun			vccio_pmu: LDO_REG1 {
298*4882a593Smuzhiyun				regulator-always-on;
299*4882a593Smuzhiyun				regulator-boot-on;
300*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
301*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
302*4882a593Smuzhiyun				regulator-name = "vccio_pmu";
303*4882a593Smuzhiyun				regulator-state-mem {
304*4882a593Smuzhiyun					regulator-on-in-suspend;
305*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
306*4882a593Smuzhiyun				};
307*4882a593Smuzhiyun			};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun			vcca_33: LDO_REG2 {
310*4882a593Smuzhiyun				regulator-always-on;
311*4882a593Smuzhiyun				regulator-boot-on;
312*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
313*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
314*4882a593Smuzhiyun				regulator-name = "vcca_33";
315*4882a593Smuzhiyun				regulator-state-mem {
316*4882a593Smuzhiyun					regulator-off-in-suspend;
317*4882a593Smuzhiyun				};
318*4882a593Smuzhiyun			};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun			vdd_10: LDO_REG3 {
321*4882a593Smuzhiyun				regulator-always-on;
322*4882a593Smuzhiyun				regulator-boot-on;
323*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
324*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
325*4882a593Smuzhiyun				regulator-name = "vdd_10";
326*4882a593Smuzhiyun				regulator-state-mem {
327*4882a593Smuzhiyun					regulator-on-in-suspend;
328*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
329*4882a593Smuzhiyun				};
330*4882a593Smuzhiyun			};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun			vcc_wl: LDO_REG4 {
333*4882a593Smuzhiyun				regulator-always-on;
334*4882a593Smuzhiyun				regulator-boot-on;
335*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
336*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
337*4882a593Smuzhiyun				regulator-name = "vcc_wl";
338*4882a593Smuzhiyun				regulator-state-mem {
339*4882a593Smuzhiyun					regulator-on-in-suspend;
340*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
341*4882a593Smuzhiyun				};
342*4882a593Smuzhiyun			};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun			vccio_sd: LDO_REG5 {
345*4882a593Smuzhiyun				regulator-always-on;
346*4882a593Smuzhiyun				regulator-boot-on;
347*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
348*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
349*4882a593Smuzhiyun				regulator-name = "vccio_sd";
350*4882a593Smuzhiyun				regulator-state-mem {
351*4882a593Smuzhiyun					regulator-on-in-suspend;
352*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
353*4882a593Smuzhiyun				};
354*4882a593Smuzhiyun			};
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun			vdd10_lcd: LDO_REG6 {
357*4882a593Smuzhiyun				regulator-always-on;
358*4882a593Smuzhiyun				regulator-boot-on;
359*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
360*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
361*4882a593Smuzhiyun				regulator-name = "vdd10_lcd";
362*4882a593Smuzhiyun				regulator-state-mem {
363*4882a593Smuzhiyun					regulator-on-in-suspend;
364*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
365*4882a593Smuzhiyun				};
366*4882a593Smuzhiyun			};
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun			vcc_18: LDO_REG7 {
369*4882a593Smuzhiyun				regulator-always-on;
370*4882a593Smuzhiyun				regulator-boot-on;
371*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
372*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
373*4882a593Smuzhiyun				regulator-name = "vcc_18";
374*4882a593Smuzhiyun				regulator-state-mem {
375*4882a593Smuzhiyun					regulator-on-in-suspend;
376*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
377*4882a593Smuzhiyun				};
378*4882a593Smuzhiyun			};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun			vcc18_lcd: LDO_REG8 {
381*4882a593Smuzhiyun				regulator-always-on;
382*4882a593Smuzhiyun				regulator-boot-on;
383*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
384*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
385*4882a593Smuzhiyun				regulator-name = "vcc18_lcd";
386*4882a593Smuzhiyun				regulator-state-mem {
387*4882a593Smuzhiyun					regulator-on-in-suspend;
388*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
389*4882a593Smuzhiyun				};
390*4882a593Smuzhiyun			};
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun			vcc_sd: SWITCH_REG1 {
393*4882a593Smuzhiyun				regulator-always-on;
394*4882a593Smuzhiyun				regulator-boot-on;
395*4882a593Smuzhiyun				regulator-name = "vcc_sd";
396*4882a593Smuzhiyun				regulator-state-mem {
397*4882a593Smuzhiyun					regulator-on-in-suspend;
398*4882a593Smuzhiyun				};
399*4882a593Smuzhiyun			};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun			vcc_lan: SWITCH_REG2 {
402*4882a593Smuzhiyun				regulator-always-on;
403*4882a593Smuzhiyun				regulator-boot-on;
404*4882a593Smuzhiyun				regulator-name = "vcc_lan";
405*4882a593Smuzhiyun				regulator-state-mem {
406*4882a593Smuzhiyun					regulator-on-in-suspend;
407*4882a593Smuzhiyun				};
408*4882a593Smuzhiyun			};
409*4882a593Smuzhiyun		};
410*4882a593Smuzhiyun	};
411*4882a593Smuzhiyun};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun&pinctrl {
414*4882a593Smuzhiyun	pcfg_output_high: pcfg-output-high {
415*4882a593Smuzhiyun		output-high;
416*4882a593Smuzhiyun	};
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun	pcfg_output_low: pcfg-output-low {
419*4882a593Smuzhiyun		output-low;
420*4882a593Smuzhiyun	};
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
423*4882a593Smuzhiyun		drive-strength = <8>;
424*4882a593Smuzhiyun	};
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
427*4882a593Smuzhiyun		bias-pull-up;
428*4882a593Smuzhiyun		drive-strength = <8>;
429*4882a593Smuzhiyun	};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun	gmac {
432*4882a593Smuzhiyun		phy_int: phy-int {
433*4882a593Smuzhiyun			rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		phy_pmeb: phy-pmeb {
437*4882a593Smuzhiyun			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
438*4882a593Smuzhiyun		};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun		phy_rst: phy-rst {
441*4882a593Smuzhiyun			rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
442*4882a593Smuzhiyun		};
443*4882a593Smuzhiyun	};
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun	pmic {
446*4882a593Smuzhiyun		pmic_int: pmic-int {
447*4882a593Smuzhiyun			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
448*4882a593Smuzhiyun		};
449*4882a593Smuzhiyun	};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun	sdmmc {
452*4882a593Smuzhiyun		sdmmc_bus4: sdmmc-bus4 {
453*4882a593Smuzhiyun			rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
454*4882a593Smuzhiyun					<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
455*4882a593Smuzhiyun					<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
456*4882a593Smuzhiyun					<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
457*4882a593Smuzhiyun		};
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun		sdmmc_clk: sdmmc-clk {
460*4882a593Smuzhiyun			rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
461*4882a593Smuzhiyun		};
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun		sdmmc_cmd: sdmmc-cmd {
464*4882a593Smuzhiyun			rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
465*4882a593Smuzhiyun		};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun		sdmmc_pwr: sdmmc-pwr {
468*4882a593Smuzhiyun			rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
469*4882a593Smuzhiyun		};
470*4882a593Smuzhiyun	};
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun	usbphy {
473*4882a593Smuzhiyun		host_drv: host-drv {
474*4882a593Smuzhiyun			rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
475*4882a593Smuzhiyun		};
476*4882a593Smuzhiyun	};
477*4882a593Smuzhiyun};
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun&uart2 {
480*4882a593Smuzhiyun	status = "okay";
481*4882a593Smuzhiyun};
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun&usbphy {
484*4882a593Smuzhiyun	pinctrl-names = "default";
485*4882a593Smuzhiyun	pinctrl-0 = <&host_drv>;
486*4882a593Smuzhiyun	vbus_drv-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
487*4882a593Smuzhiyun	status = "okay";
488*4882a593Smuzhiyun};
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun&usb_host0_ehci {
491*4882a593Smuzhiyun	status = "okay";
492*4882a593Smuzhiyun};
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun&usb_host1 {
495*4882a593Smuzhiyun	status = "okay";
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&usb_otg {
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun&usb_hsic {
503*4882a593Smuzhiyun	status = "okay";
504*4882a593Smuzhiyun};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun&vopl {
507*4882a593Smuzhiyun	status = "okay";
508*4882a593Smuzhiyun};
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun&vpu {
511*4882a593Smuzhiyun	status = "okay";
512*4882a593Smuzhiyun};
513