xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3229-gva.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier:     GPL-2.0+ X11
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include "rk322x.dtsi"
10*4882a593Smuzhiyun#include "rk322x-u-boot.dtsi"
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "RK3229 GVA/Android Things Board V1.0";
15*4882a593Smuzhiyun	compatible = "rockchip,rk3229-gva", "rockchip,rk3229";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		stdout-path = &uart2;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	memory@60000000 {
22*4882a593Smuzhiyun		device_type = "memory";
23*4882a593Smuzhiyun		reg = <0x60000000 0x40000000>;
24*4882a593Smuzhiyun	};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
27*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
28*4882a593Smuzhiyun		clocks = <&rk805 1>;
29*4882a593Smuzhiyun		clock-names = "ext_clock";
30*4882a593Smuzhiyun		pinctrl-names = "default";
31*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun		/*
34*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
35*4882a593Smuzhiyun		 * on the actual card populated):
36*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
37*4882a593Smuzhiyun		 * - PDN (power down when low)
38*4882a593Smuzhiyun		 */
39*4882a593Smuzhiyun		reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	vcc_host: vcc-host-regulator {
43*4882a593Smuzhiyun		compatible = "regulator-fixed";
44*4882a593Smuzhiyun		enable-active-high;
45*4882a593Smuzhiyun		gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
46*4882a593Smuzhiyun		pinctrl-names = "default";
47*4882a593Smuzhiyun		pinctrl-0 = <&host_vbus_drv>;
48*4882a593Smuzhiyun		regulator-name = "vcc_host";
49*4882a593Smuzhiyun		regulator-always-on;
50*4882a593Smuzhiyun		regulator-boot-on;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	wireless-bluetooth {
54*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
55*4882a593Smuzhiyun		clocks = <&rk805 1>;
56*4882a593Smuzhiyun		clock-names = "ext_clock";
57*4882a593Smuzhiyun		uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
58*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
59*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio2 29 GPIO_ACTIVE_HIGH>;
60*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio3 27 GPIO_ACTIVE_HIGH>;
61*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
62*4882a593Smuzhiyun		status = "okay";
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	wireless-wlan {
66*4882a593Smuzhiyun		compatible = "wlan-platdata";
67*4882a593Smuzhiyun		rockchip,grf = <&grf>;
68*4882a593Smuzhiyun		wifi_chip_type = "ap6255";
69*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
70*4882a593Smuzhiyun		status = "okay";
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	gpio_keys {
74*4882a593Smuzhiyun		compatible = "gpio-keys";
75*4882a593Smuzhiyun		#address-cells = <1>;
76*4882a593Smuzhiyun		#size-cells = <0>;
77*4882a593Smuzhiyun		autorepeat;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		pinctrl-names = "default";
80*4882a593Smuzhiyun		pinctrl-0 = <&pwr_key>;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		power_key: power-key {
83*4882a593Smuzhiyun			label = "GPIO Key Power";
84*4882a593Smuzhiyun			gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
85*4882a593Smuzhiyun			linux,code = <116>;
86*4882a593Smuzhiyun			debounce-interval = <100>;
87*4882a593Smuzhiyun			wakeup-source;
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&i2c0 {
94*4882a593Smuzhiyun	status = "okay";
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	rk805: rk805@18 {
97*4882a593Smuzhiyun		compatible = "rockchip,rk805";
98*4882a593Smuzhiyun		status = "okay";
99*4882a593Smuzhiyun		reg = <0x18>;
100*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
101*4882a593Smuzhiyun		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
102*4882a593Smuzhiyun		pinctrl-names = "default";
103*4882a593Smuzhiyun		pinctrl-0 = <&pmic_int_l>;
104*4882a593Smuzhiyun		rockchip,system-power-controller;
105*4882a593Smuzhiyun		wakeup-source;
106*4882a593Smuzhiyun		gpio-controller;
107*4882a593Smuzhiyun		#gpio-cells = <2>;
108*4882a593Smuzhiyun		#clock-cells = <1>;
109*4882a593Smuzhiyun		clock-output-names = "xin32k", "rk805-clkout2";
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		rtc {
112*4882a593Smuzhiyun			status = "okay";
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		pwrkey {
116*4882a593Smuzhiyun			status = "okay";
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun		gpio {
120*4882a593Smuzhiyun			status = "okay";
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		regulators {
124*4882a593Smuzhiyun			compatible = "rk805-regulator";
125*4882a593Smuzhiyun			status = "okay";
126*4882a593Smuzhiyun			#address-cells = <1>;
127*4882a593Smuzhiyun			#size-cells = <0>;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun			vdd_arm: RK805_DCDC1@0 {
130*4882a593Smuzhiyun				regulator-compatible = "RK805_DCDC1";
131*4882a593Smuzhiyun				regulator-name = "vdd_arm";
132*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
133*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
134*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
135*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
136*4882a593Smuzhiyun				regulator-boot-on;
137*4882a593Smuzhiyun				regulator-always-on;
138*4882a593Smuzhiyun				regulator-state-mem {
139*4882a593Smuzhiyun					regulator-mode = <0x2>;
140*4882a593Smuzhiyun					regulator-on-in-suspend;
141*4882a593Smuzhiyun					regulator-suspend-microvolt = <950000>;
142*4882a593Smuzhiyun				};
143*4882a593Smuzhiyun			};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun			vdd_logic: RK805_DCDC2@1 {
146*4882a593Smuzhiyun				regulator-compatible = "RK805_DCDC2";
147*4882a593Smuzhiyun				regulator-name = "vdd_logic";
148*4882a593Smuzhiyun				regulator-min-microvolt = <712500>;
149*4882a593Smuzhiyun				regulator-max-microvolt = <1450000>;
150*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
151*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
152*4882a593Smuzhiyun				regulator-boot-on;
153*4882a593Smuzhiyun				regulator-always-on;
154*4882a593Smuzhiyun				regulator-state-mem {
155*4882a593Smuzhiyun					regulator-mode = <0x2>;
156*4882a593Smuzhiyun					regulator-on-in-suspend;
157*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
158*4882a593Smuzhiyun				};
159*4882a593Smuzhiyun			};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun			vcc_ddr: RK805_DCDC3@2 {
162*4882a593Smuzhiyun				regulator-compatible = "RK805_DCDC3";
163*4882a593Smuzhiyun				regulator-name = "vcc_ddr";
164*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
165*4882a593Smuzhiyun				regulator-boot-on;
166*4882a593Smuzhiyun				regulator-always-on;
167*4882a593Smuzhiyun				regulator-state-mem {
168*4882a593Smuzhiyun					regulator-mode = <0x2>;
169*4882a593Smuzhiyun					regulator-on-in-suspend;
170*4882a593Smuzhiyun				};
171*4882a593Smuzhiyun			};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun			vcc_io: RK805_DCDC4@3 {
174*4882a593Smuzhiyun				regulator-compatible = "RK805_DCDC4";
175*4882a593Smuzhiyun				regulator-name = "vcc_io";
176*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
177*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
178*4882a593Smuzhiyun				regulator-initial-mode = <0x1>;
179*4882a593Smuzhiyun				regulator-boot-on;
180*4882a593Smuzhiyun				regulator-always-on;
181*4882a593Smuzhiyun				regulator-state-mem {
182*4882a593Smuzhiyun					regulator-mode = <0x2>;
183*4882a593Smuzhiyun					regulator-on-in-suspend;
184*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
185*4882a593Smuzhiyun				};
186*4882a593Smuzhiyun			};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun			vcc_18: RK805_LDO1@4 {
189*4882a593Smuzhiyun				regulator-compatible = "RK805_LDO1";
190*4882a593Smuzhiyun				regulator-name = "vcc_18";
191*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
192*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
193*4882a593Smuzhiyun				regulator-boot-on;
194*4882a593Smuzhiyun				regulator-always-on;
195*4882a593Smuzhiyun				regulator-state-mem {
196*4882a593Smuzhiyun					regulator-on-in-suspend;
197*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
198*4882a593Smuzhiyun				};
199*4882a593Smuzhiyun			};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun			vcc_18emmc: RK805_LDO2@5 {
202*4882a593Smuzhiyun				regulator-compatible = "RK805_LDO2";
203*4882a593Smuzhiyun				regulator-name = "vcc_18emmc";
204*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
205*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
206*4882a593Smuzhiyun				regulator-boot-on;
207*4882a593Smuzhiyun				regulator-always-on;
208*4882a593Smuzhiyun				regulator-state-mem {
209*4882a593Smuzhiyun					regulator-on-in-suspend;
210*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
211*4882a593Smuzhiyun				};
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			vdd_10: RK805_LDO3@6 {
215*4882a593Smuzhiyun				regulator-compatible = "RK805_LDO3";
216*4882a593Smuzhiyun				regulator-name = "vdd_10";
217*4882a593Smuzhiyun				regulator-min-microvolt = <1000000>;
218*4882a593Smuzhiyun				regulator-max-microvolt = <1000000>;
219*4882a593Smuzhiyun				regulator-boot-on;
220*4882a593Smuzhiyun				regulator-always-on;
221*4882a593Smuzhiyun				regulator-state-mem {
222*4882a593Smuzhiyun					regulator-on-in-suspend;
223*4882a593Smuzhiyun					regulator-suspend-microvolt = <1000000>;
224*4882a593Smuzhiyun				};
225*4882a593Smuzhiyun			};
226*4882a593Smuzhiyun		};
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun	cw201x: cw2015@62 {
230*4882a593Smuzhiyun		compatible = "cw201x";
231*4882a593Smuzhiyun		status = "okay";
232*4882a593Smuzhiyun		reg = <0x62>;
233*4882a593Smuzhiyun		bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48
234*4882a593Smuzhiyun				   0x48 0x44 0x44 0x46 0x49 0x48 0x32 0x24
235*4882a593Smuzhiyun				   0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45
236*4882a593Smuzhiyun				   0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E
237*4882a593Smuzhiyun				   0x4D 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D
238*4882a593Smuzhiyun				   0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52
239*4882a593Smuzhiyun				   0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 0xCB
240*4882a593Smuzhiyun				   0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>;
241*4882a593Smuzhiyun		support_dc_adp = <1>;
242*4882a593Smuzhiyun		dc_det_gpio = <88>;
243*4882a593Smuzhiyun		dc_det_flag = <1>;
244*4882a593Smuzhiyun		hw_id_check = <1>;
245*4882a593Smuzhiyun		hw_id0_gpio = <86>;
246*4882a593Smuzhiyun		hw_id1_gpio = <87>;
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun&cpu0 {
251*4882a593Smuzhiyun	cpu-supply = <&vdd_arm>;
252*4882a593Smuzhiyun};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun&pinctrl {
255*4882a593Smuzhiyun	pmic {
256*4882a593Smuzhiyun		pmic_int_l: pmic-int-l {
257*4882a593Smuzhiyun			rockchip,pins = <1 12 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_b4 */
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun	sdio-pwrseq {
262*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
263*4882a593Smuzhiyun			rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
264*4882a593Smuzhiyun		};
265*4882a593Smuzhiyun	};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun	usb {
268*4882a593Smuzhiyun		host_vbus_drv: host-vbus-drv {
269*4882a593Smuzhiyun			rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
270*4882a593Smuzhiyun		};
271*4882a593Smuzhiyun	};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun	keys {
274*4882a593Smuzhiyun		pwr_key: pwr-key {
275*4882a593Smuzhiyun			rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
276*4882a593Smuzhiyun		};
277*4882a593Smuzhiyun	};
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun&dmc {
281*4882a593Smuzhiyun	rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3
282*4882a593Smuzhiyun		0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4
283*4882a593Smuzhiyun		0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1
284*4882a593Smuzhiyun		0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4
285*4882a593Smuzhiyun		0x0 0x924>;
286*4882a593Smuzhiyun	rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>;
287*4882a593Smuzhiyun	rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15
288*4882a593Smuzhiyun		0 300 3 0 120>;
289*4882a593Smuzhiyun};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun&emmc {
292*4882a593Smuzhiyun	status = "okay";
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&uart2 {
296*4882a593Smuzhiyun	status = "okay";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&u2phy0 {
300*4882a593Smuzhiyun	status = "okay";
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun	u2phy0_otg: otg-port {
303*4882a593Smuzhiyun		status = "okay";
304*4882a593Smuzhiyun	};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun	u2phy0_host: host-port {
307*4882a593Smuzhiyun		status = "okay";
308*4882a593Smuzhiyun	};
309*4882a593Smuzhiyun};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun&usb20_otg {
312*4882a593Smuzhiyun       status = "okay";
313*4882a593Smuzhiyun};
314