xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk3128-u-boot.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier:     GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	aliases {
9*4882a593Smuzhiyun		mmc0 = &emmc;
10*4882a593Smuzhiyun		mmc1 = &sdmmc;
11*4882a593Smuzhiyun	};
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	chosen {
14*4882a593Smuzhiyun		stdout-path = &uart2;
15*4882a593Smuzhiyun	};
16*4882a593Smuzhiyun};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun&psci {
19*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
20*4882a593Smuzhiyun	status = "okay";
21*4882a593Smuzhiyun};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun&dmc {
24*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
25*4882a593Smuzhiyun};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun&nandc {
28*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
29*4882a593Smuzhiyun	status = "okay";
30*4882a593Smuzhiyun	#address-cells = <1>;
31*4882a593Smuzhiyun	#size-cells = <0>;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	nand@0 {
34*4882a593Smuzhiyun		u-boot,dm-spl;
35*4882a593Smuzhiyun		reg = <0>;
36*4882a593Smuzhiyun		nand-ecc-mode = "hw";
37*4882a593Smuzhiyun		nand-ecc-strength = <16>;
38*4882a593Smuzhiyun		nand-ecc-step-size = <1024>;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun&sfc {
43*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
44*4882a593Smuzhiyun	status = "okay";
45*4882a593Smuzhiyun};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun&emmc {
48*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
49*4882a593Smuzhiyun	status = "okay";
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&grf {
53*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
54*4882a593Smuzhiyun};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun&cru {
57*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&uart1 {
61*4882a593Smuzhiyun	clock-frequency = <24000000>;
62*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
63*4882a593Smuzhiyun};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun&uart2 {
66*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
67*4882a593Smuzhiyun	clock-frequency = <24000000>;
68*4882a593Smuzhiyun};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun&u2phy {
71*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
72*4882a593Smuzhiyun	status = "okay";
73*4882a593Smuzhiyun};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun&u2phy_otg {
76*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
77*4882a593Smuzhiyun	status = "okay";
78*4882a593Smuzhiyun};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun&usb_otg {
81*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
82*4882a593Smuzhiyun	status = "okay";
83*4882a593Smuzhiyun};
84