xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk1808-u-boot.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun// SPDX-License-Identifier:     GPL-2.0+
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/ {
8*4882a593Smuzhiyun	aliases {
9*4882a593Smuzhiyun		mmc0 = &emmc;
10*4882a593Smuzhiyun		mmc1 = &sdmmc;
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun		serial0 = &uart0;
13*4882a593Smuzhiyun		serial1 = &uart1;
14*4882a593Smuzhiyun		serial2 = &uart2;
15*4882a593Smuzhiyun		serial3 = &uart3;
16*4882a593Smuzhiyun		serial4 = &uart4;
17*4882a593Smuzhiyun		serial5 = &uart5;
18*4882a593Smuzhiyun		serial6 = &uart6;
19*4882a593Smuzhiyun		serial7 = &uart7;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	chosen {
23*4882a593Smuzhiyun		stdout-path = &uart2;
24*4882a593Smuzhiyun		u-boot,spl-boot-order = &spi_nand, &spi_nor, &emmc;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun&psci {
30*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
31*4882a593Smuzhiyun	status = "okay";
32*4882a593Smuzhiyun};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun&crypto {
35*4882a593Smuzhiyun	u-boot,dm-spl;
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&dmc {
39*4882a593Smuzhiyun	u-boot,dm-spl;
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun&cru {
43*4882a593Smuzhiyun	u-boot,dm-spl;
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&grf {
47*4882a593Smuzhiyun	u-boot,dm-spl;
48*4882a593Smuzhiyun};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun&pmugrf {
51*4882a593Smuzhiyun	u-boot,dm-spl;
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&emmc {
55*4882a593Smuzhiyun	u-boot,dm-spl;
56*4882a593Smuzhiyun	status = "okay";
57*4882a593Smuzhiyun};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun&sdmmc {
60*4882a593Smuzhiyun	u-boot,dm-spl;
61*4882a593Smuzhiyun	status = "okay";
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&sfc {
65*4882a593Smuzhiyun	u-boot,dm-spl;
66*4882a593Smuzhiyun	status = "okay";
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun	#address-cells = <1>;
69*4882a593Smuzhiyun	#size-cells = <0>;
70*4882a593Smuzhiyun	spi_nand: flash@0 {
71*4882a593Smuzhiyun		u-boot,dm-spl;
72*4882a593Smuzhiyun		compatible = "spi-nand";
73*4882a593Smuzhiyun		reg = <0>;
74*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
75*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
76*4882a593Smuzhiyun		spi-max-frequency = <96000000>;
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	spi_nor: flash@1 {
80*4882a593Smuzhiyun		u-boot,dm-spl;
81*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
82*4882a593Smuzhiyun		label = "sfc_nor";
83*4882a593Smuzhiyun		reg = <0>;
84*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
85*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
86*4882a593Smuzhiyun		spi-max-frequency = <96000000>;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun&saradc {
91*4882a593Smuzhiyun	u-boot,dm-spl;
92*4882a593Smuzhiyun	status = "okay";
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&sfc {
96*4882a593Smuzhiyun	u-boot,dm-spl;
97*4882a593Smuzhiyun	status = "okay";
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&uart0 {
101*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&uart1 {
105*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&uart2 {
109*4882a593Smuzhiyun	u-boot,dm-spl;
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&uart3 {
113*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
114*4882a593Smuzhiyun};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun&uart4 {
117*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
118*4882a593Smuzhiyun};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun&uart5 {
121*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
122*4882a593Smuzhiyun};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun&uart6 {
125*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
126*4882a593Smuzhiyun};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun&uart7 {
129*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
130*4882a593Smuzhiyun};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun&u2phy {
133*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
134*4882a593Smuzhiyun	status = "okay";
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&usb2phy_grf {
138*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
139*4882a593Smuzhiyun	status = "okay";
140*4882a593Smuzhiyun};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun&u2phy_host {
143*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
144*4882a593Smuzhiyun	status = "okay";
145*4882a593Smuzhiyun};
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun&u2phy_otg {
148*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&usb_host0_ehci {
153*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
154*4882a593Smuzhiyun	status = "okay";
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&usb_host0_ohci {
158*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun&usbdrd3 {
163*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
164*4882a593Smuzhiyun	status = "okay";
165*4882a593Smuzhiyun};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun&usbdrd_dwc3 {
168*4882a593Smuzhiyun	u-boot,dm-pre-reloc;
169*4882a593Smuzhiyun	status = "okay";
170*4882a593Smuzhiyun};
171