xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/rk1808-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier:     GPL-2.0+
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * (C) Copyright 2018 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun#include "rk1808.dtsi"
9*4882a593Smuzhiyun#include "rk1808-u-boot.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
11*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
12*4882a593Smuzhiyun#include <linux/media-bus-format.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "Rockchip RK1808 EVB";
16*4882a593Smuzhiyun	compatible = "rockchip,rk1808-evb", "rockchip,rk1808";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	adc-keys {
19*4882a593Smuzhiyun		status = "okay";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun		u-boot,dm-spl;
22*4882a593Smuzhiyun		compatible = "adc-keys";
23*4882a593Smuzhiyun		io-channels = <&saradc 2>;
24*4882a593Smuzhiyun		io-channel-names = "buttons";
25*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		vol-up-key {
28*4882a593Smuzhiyun			u-boot,dm-spl;
29*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
30*4882a593Smuzhiyun			label = "volume up";
31*4882a593Smuzhiyun			press-threshold-microvolt = <10000>;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	vcc_phy: vcc-phy-regulator {
36*4882a593Smuzhiyun		u-boot,dm-spl;
37*4882a593Smuzhiyun		compatible = "regulator-fixed";
38*4882a593Smuzhiyun		regulator-name = "vcc_phy";
39*4882a593Smuzhiyun		regulator-always-on;
40*4882a593Smuzhiyun		regulator-boot-on;
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun&crypto {
45*4882a593Smuzhiyun	status = "okay";
46*4882a593Smuzhiyun};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun&emmc {
49*4882a593Smuzhiyun	fifo-mode;
50*4882a593Smuzhiyun	bus-width = <8>;
51*4882a593Smuzhiyun	cap-mmc-highspeed;
52*4882a593Smuzhiyun	mmc-hs200-1_8v;
53*4882a593Smuzhiyun	supports-emmc;
54*4882a593Smuzhiyun	disable-wp;
55*4882a593Smuzhiyun	non-removable;
56*4882a593Smuzhiyun	num-slots = <1>;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	status = "okay";
59*4882a593Smuzhiyun};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun&gmac {
62*4882a593Smuzhiyun	phy-supply = <&vcc_phy>;
63*4882a593Smuzhiyun	phy-mode = "rgmii";
64*4882a593Smuzhiyun	clock_in_out = "input";
65*4882a593Smuzhiyun	snps,reset-gpio = <&gpio0 10 GPIO_ACTIVE_LOW>;
66*4882a593Smuzhiyun	snps,reset-active-low;
67*4882a593Smuzhiyun	/* Reset time is 20ms, 100ms for rtl8211f */
68*4882a593Smuzhiyun	snps,reset-delays-us = <0 20000 100000>;
69*4882a593Smuzhiyun	assigned-clocks = <&cru SCLK_GMAC>;
70*4882a593Smuzhiyun	assigned-clock-parents = <&gmac_clkin>;
71*4882a593Smuzhiyun	tx_delay = <0x50>;
72*4882a593Smuzhiyun	rx_delay = <0x3a>;
73*4882a593Smuzhiyun	status = "disabled";
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&uart2 {
77*4882a593Smuzhiyun	clock-frequency = <24000000>;
78*4882a593Smuzhiyun	status = "okay";
79*4882a593Smuzhiyun};
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