xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/r8a7796-salvator-x.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Source for the Salvator-X board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2016 Renesas Electronics Corp.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
7*4882a593Smuzhiyun * version 2.  This program is licensed "as is" without any warranty of any
8*4882a593Smuzhiyun * kind, whether express or implied.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/dts-v1/;
12*4882a593Smuzhiyun#include "r8a7796.dtsi"
13*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/ {
16*4882a593Smuzhiyun	model = "Renesas Salvator-X board based on r8a7796";
17*4882a593Smuzhiyun	compatible = "renesas,salvator-x", "renesas,r8a7796";
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	aliases {
20*4882a593Smuzhiyun		serial0 = &scif2;
21*4882a593Smuzhiyun		serial1 = &scif1;
22*4882a593Smuzhiyun		ethernet0 = &avb;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		bootargs = "ignore_loglevel";
27*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	memory@48000000 {
31*4882a593Smuzhiyun		device_type = "memory";
32*4882a593Smuzhiyun		/* first 128MB is reserved for secure area. */
33*4882a593Smuzhiyun		reg = <0x0 0x48000000 0x0 0x78000000>;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	memory@600000000 {
37*4882a593Smuzhiyun		device_type = "memory";
38*4882a593Smuzhiyun		reg = <0x6 0x00000000 0x0 0x80000000>;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	reg_1p8v: regulator0 {
42*4882a593Smuzhiyun		compatible = "regulator-fixed";
43*4882a593Smuzhiyun		regulator-name = "fixed-1.8V";
44*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
45*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
46*4882a593Smuzhiyun		regulator-boot-on;
47*4882a593Smuzhiyun		regulator-always-on;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	reg_3p3v: regulator1 {
51*4882a593Smuzhiyun		compatible = "regulator-fixed";
52*4882a593Smuzhiyun		regulator-name = "fixed-3.3V";
53*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
54*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
55*4882a593Smuzhiyun		regulator-boot-on;
56*4882a593Smuzhiyun		regulator-always-on;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	vcc_sdhi0: regulator-vcc-sdhi0 {
60*4882a593Smuzhiyun		compatible = "regulator-fixed";
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		regulator-name = "SDHI0 Vcc";
63*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
64*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
67*4882a593Smuzhiyun		enable-active-high;
68*4882a593Smuzhiyun	};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun	vccq_sdhi0: regulator-vccq-sdhi0 {
71*4882a593Smuzhiyun		compatible = "regulator-gpio";
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun		regulator-name = "SDHI0 VccQ";
74*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
75*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
78*4882a593Smuzhiyun		gpios-states = <1>;
79*4882a593Smuzhiyun		states = <3300000 1
80*4882a593Smuzhiyun			  1800000 0>;
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	vcc_sdhi3: regulator-vcc-sdhi3 {
84*4882a593Smuzhiyun		compatible = "regulator-fixed";
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun		regulator-name = "SDHI3 Vcc";
87*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
88*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun		gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
91*4882a593Smuzhiyun		enable-active-high;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	vccq_sdhi3: regulator-vccq-sdhi3 {
95*4882a593Smuzhiyun		compatible = "regulator-gpio";
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		regulator-name = "SDHI3 VccQ";
98*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
99*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
102*4882a593Smuzhiyun		gpios-states = <1>;
103*4882a593Smuzhiyun		states = <3300000 1
104*4882a593Smuzhiyun			  1800000 0>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&pfc {
109*4882a593Smuzhiyun	pinctrl-0 = <&scif_clk_pins>;
110*4882a593Smuzhiyun	pinctrl-names = "default";
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	avb_pins: avb {
113*4882a593Smuzhiyun		groups = "avb_mdc";
114*4882a593Smuzhiyun		function = "avb";
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	scif1_pins: scif1 {
118*4882a593Smuzhiyun		groups = "scif1_data_a", "scif1_ctrl";
119*4882a593Smuzhiyun		function = "scif1";
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	scif2_pins: scif2 {
123*4882a593Smuzhiyun		groups = "scif2_data_a";
124*4882a593Smuzhiyun		function = "scif2";
125*4882a593Smuzhiyun	};
126*4882a593Smuzhiyun	scif_clk_pins: scif_clk {
127*4882a593Smuzhiyun		groups = "scif_clk_a";
128*4882a593Smuzhiyun		function = "scif_clk";
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun	i2c2_pins: i2c2 {
132*4882a593Smuzhiyun		groups = "i2c2_a";
133*4882a593Smuzhiyun		function = "i2c2";
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	sdhi0_pins: sd0 {
137*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
138*4882a593Smuzhiyun		function = "sdhi0";
139*4882a593Smuzhiyun		power-source = <3300>;
140*4882a593Smuzhiyun	};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun	sdhi0_pins_uhs: sd0_uhs {
143*4882a593Smuzhiyun		groups = "sdhi0_data4", "sdhi0_ctrl";
144*4882a593Smuzhiyun		function = "sdhi0";
145*4882a593Smuzhiyun		power-source = <1800>;
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	sdhi2_pins: sd2 {
149*4882a593Smuzhiyun		groups = "sdhi2_data8", "sdhi2_ctrl";
150*4882a593Smuzhiyun		function = "sdhi2";
151*4882a593Smuzhiyun		power-source = <3300>;
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	sdhi2_pins_uhs: sd2_uhs {
155*4882a593Smuzhiyun		groups = "sdhi2_data8", "sdhi2_ctrl";
156*4882a593Smuzhiyun		function = "sdhi2";
157*4882a593Smuzhiyun		power-source = <1800>;
158*4882a593Smuzhiyun	};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun	sdhi3_pins: sd3 {
161*4882a593Smuzhiyun		groups = "sdhi3_data4", "sdhi3_ctrl";
162*4882a593Smuzhiyun		function = "sdhi3";
163*4882a593Smuzhiyun		power-source = <3300>;
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	sdhi3_pins_uhs: sd3_uhs {
167*4882a593Smuzhiyun		groups = "sdhi3_data4", "sdhi3_ctrl";
168*4882a593Smuzhiyun		function = "sdhi3";
169*4882a593Smuzhiyun		power-source = <1800>;
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun&avb {
174*4882a593Smuzhiyun	pinctrl-0 = <&avb_pins>;
175*4882a593Smuzhiyun	pinctrl-names = "default";
176*4882a593Smuzhiyun	renesas,no-ether-link;
177*4882a593Smuzhiyun	phy-handle = <&phy0>;
178*4882a593Smuzhiyun	status = "okay";
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun	phy0: ethernet-phy@0 {
181*4882a593Smuzhiyun		rxc-skew-ps = <1500>;
182*4882a593Smuzhiyun		reg = <0>;
183*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
184*4882a593Smuzhiyun		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&extal_clk {
189*4882a593Smuzhiyun	clock-frequency = <16666666>;
190*4882a593Smuzhiyun};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun&extalr_clk {
193*4882a593Smuzhiyun	clock-frequency = <32768>;
194*4882a593Smuzhiyun};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun&sdhi0 {
197*4882a593Smuzhiyun	pinctrl-0 = <&sdhi0_pins>;
198*4882a593Smuzhiyun	pinctrl-1 = <&sdhi0_pins_uhs>;
199*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdhi0>;
202*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi0>;
203*4882a593Smuzhiyun	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
204*4882a593Smuzhiyun	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
205*4882a593Smuzhiyun	bus-width = <4>;
206*4882a593Smuzhiyun	sd-uhs-sdr50;
207*4882a593Smuzhiyun	status = "okay";
208*4882a593Smuzhiyun};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun&sdhi2 {
211*4882a593Smuzhiyun	/* used for on-board 8bit eMMC */
212*4882a593Smuzhiyun	pinctrl-0 = <&sdhi2_pins>;
213*4882a593Smuzhiyun	pinctrl-1 = <&sdhi2_pins_uhs>;
214*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun	vmmc-supply = <&reg_3p3v>;
217*4882a593Smuzhiyun	vqmmc-supply = <&reg_1p8v>;
218*4882a593Smuzhiyun	bus-width = <8>;
219*4882a593Smuzhiyun	non-removable;
220*4882a593Smuzhiyun	status = "okay";
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&sdhi3 {
224*4882a593Smuzhiyun	pinctrl-0 = <&sdhi3_pins>;
225*4882a593Smuzhiyun	pinctrl-1 = <&sdhi3_pins_uhs>;
226*4882a593Smuzhiyun	pinctrl-names = "default", "state_uhs";
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun	vmmc-supply = <&vcc_sdhi3>;
229*4882a593Smuzhiyun	vqmmc-supply = <&vccq_sdhi3>;
230*4882a593Smuzhiyun	cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
231*4882a593Smuzhiyun	wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
232*4882a593Smuzhiyun	bus-width = <4>;
233*4882a593Smuzhiyun	sd-uhs-sdr50;
234*4882a593Smuzhiyun	status = "okay";
235*4882a593Smuzhiyun};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun&scif1 {
238*4882a593Smuzhiyun	pinctrl-0 = <&scif1_pins>;
239*4882a593Smuzhiyun	pinctrl-names = "default";
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun	uart-has-rtscts;
242*4882a593Smuzhiyun	status = "okay";
243*4882a593Smuzhiyun};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun&scif2 {
246*4882a593Smuzhiyun	pinctrl-0 = <&scif2_pins>;
247*4882a593Smuzhiyun	pinctrl-names = "default";
248*4882a593Smuzhiyun	status = "okay";
249*4882a593Smuzhiyun};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun&scif_clk {
252*4882a593Smuzhiyun	clock-frequency = <14745600>;
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&i2c2 {
256*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
257*4882a593Smuzhiyun	pinctrl-names = "default";
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun	status = "okay";
260*4882a593Smuzhiyun};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun&wdt0 {
263*4882a593Smuzhiyun	timeout-sec = <60>;
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&i2c_dvfs {
268*4882a593Smuzhiyun	status = "okay";
269*4882a593Smuzhiyun};
270