1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 3*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 4*4882a593Smuzhiyun * published by the Free Software Foundation. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun cpus { 11*4882a593Smuzhiyun cpu@0 { 12*4882a593Smuzhiyun cpu0-supply = <&vcc>; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@80000000 { 17*4882a593Smuzhiyun device_type = "memory"; 18*4882a593Smuzhiyun reg = <0x80000000 0>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun leds { 22*4882a593Smuzhiyun compatible = "gpio-leds"; 23*4882a593Smuzhiyun user0 { 24*4882a593Smuzhiyun label = "user0"; 25*4882a593Smuzhiyun gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */ 26*4882a593Smuzhiyun linux,default-trigger = "none"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun wl12xx_vmmc: wl12xx_vmmc { 31*4882a593Smuzhiyun compatible = "regulator-fixed"; 32*4882a593Smuzhiyun regulator-name = "vwl1271"; 33*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 34*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 35*4882a593Smuzhiyun gpio = <&gpio5 29 0>; /* gpio157 */ 36*4882a593Smuzhiyun startup-delay-us = <70000>; 37*4882a593Smuzhiyun enable-active-high; 38*4882a593Smuzhiyun vin-supply = <&vmmc2>; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&gpmc { 43*4882a593Smuzhiyun ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun nand@0,0 { 46*4882a593Smuzhiyun compatible = "ti,omap2-nand"; 47*4882a593Smuzhiyun reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 48*4882a593Smuzhiyun interrupt-parent = <&gpmc>; 49*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 50*4882a593Smuzhiyun <1 IRQ_TYPE_NONE>; /* termcount */ 51*4882a593Smuzhiyun linux,mtd-name = "micron,mt29f4g16abbda3w"; 52*4882a593Smuzhiyun nand-bus-width = <16>; 53*4882a593Smuzhiyun ti,nand-ecc-opt = "bch8"; 54*4882a593Smuzhiyun rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 55*4882a593Smuzhiyun gpmc,sync-clk-ps = <0>; 56*4882a593Smuzhiyun gpmc,cs-on-ns = <0>; 57*4882a593Smuzhiyun gpmc,cs-rd-off-ns = <44>; 58*4882a593Smuzhiyun gpmc,cs-wr-off-ns = <44>; 59*4882a593Smuzhiyun gpmc,adv-on-ns = <6>; 60*4882a593Smuzhiyun gpmc,adv-rd-off-ns = <34>; 61*4882a593Smuzhiyun gpmc,adv-wr-off-ns = <44>; 62*4882a593Smuzhiyun gpmc,we-off-ns = <40>; 63*4882a593Smuzhiyun gpmc,oe-off-ns = <54>; 64*4882a593Smuzhiyun gpmc,access-ns = <64>; 65*4882a593Smuzhiyun gpmc,rd-cycle-ns = <82>; 66*4882a593Smuzhiyun gpmc,wr-cycle-ns = <82>; 67*4882a593Smuzhiyun gpmc,wr-access-ns = <40>; 68*4882a593Smuzhiyun gpmc,wr-data-mux-bus-ns = <0>; 69*4882a593Smuzhiyun gpmc,device-width = <2>; 70*4882a593Smuzhiyun #address-cells = <1>; 71*4882a593Smuzhiyun #size-cells = <1>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&i2c1 { 76*4882a593Smuzhiyun clock-frequency = <400000>; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun twl: twl@48 { 79*4882a593Smuzhiyun reg = <0x48>; 80*4882a593Smuzhiyun interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 81*4882a593Smuzhiyun interrupt-parent = <&intc>; 82*4882a593Smuzhiyun twl_audio: audio { 83*4882a593Smuzhiyun compatible = "ti,twl4030-audio"; 84*4882a593Smuzhiyun codec { 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&i2c2 { 91*4882a593Smuzhiyun clock-frequency = <400000>; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun&i2c3 { 95*4882a593Smuzhiyun clock-frequency = <400000>; 96*4882a593Smuzhiyun at24@50 { 97*4882a593Smuzhiyun compatible = "at24,24c02"; 98*4882a593Smuzhiyun readonly; 99*4882a593Smuzhiyun reg = <0x50>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun}; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun/* 104*4882a593Smuzhiyun * Only found on the wireless SOM. For the SOM without wireless, the pins for 105*4882a593Smuzhiyun * MMC3 can be routed with jumpers to the second MMC slot on the devkit and 106*4882a593Smuzhiyun * gpio157 is not connected. So this should be OK to keep common for now, 107*4882a593Smuzhiyun * probably device tree overlays is the way to go with the various SOM and 108*4882a593Smuzhiyun * jumpering combinations for the long run. 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun&mmc3 { 111*4882a593Smuzhiyun interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>; 112*4882a593Smuzhiyun pinctrl-0 = <&mmc3_pins &mmc3_core2_pins>; 113*4882a593Smuzhiyun pinctrl-names = "default"; 114*4882a593Smuzhiyun vmmc-supply = <&wl12xx_vmmc>; 115*4882a593Smuzhiyun non-removable; 116*4882a593Smuzhiyun bus-width = <4>; 117*4882a593Smuzhiyun cap-power-off-card; 118*4882a593Smuzhiyun #address-cells = <1>; 119*4882a593Smuzhiyun #size-cells = <0>; 120*4882a593Smuzhiyun wlcore: wlcore@2 { 121*4882a593Smuzhiyun compatible = "ti,wl1283"; 122*4882a593Smuzhiyun reg = <2>; 123*4882a593Smuzhiyun interrupt-parent = <&gpio5>; 124*4882a593Smuzhiyun interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 125*4882a593Smuzhiyun ref-clock-frequency = <26000000>; 126*4882a593Smuzhiyun tcxo-clock-frequency = <26000000>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun}; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun&omap3_pmx_core { 131*4882a593Smuzhiyun mmc3_pins: pinmux_mm3_pins { 132*4882a593Smuzhiyun pinctrl-single,pins = < 133*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */ 134*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */ 135*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */ 136*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */ 137*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */ 138*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr.gpio_157 */ 139*4882a593Smuzhiyun >; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun mcbsp2_pins: pinmux_mcbsp2_pins { 142*4882a593Smuzhiyun pinctrl-single,pins = < 143*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */ 144*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */ 145*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */ 146*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */ 147*4882a593Smuzhiyun >; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun uart2_pins: pinmux_uart2_pins { 150*4882a593Smuzhiyun pinctrl-single,pins = < 151*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 152*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 153*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 154*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 155*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */ 156*4882a593Smuzhiyun >; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun mcspi1_pins: pinmux_mcspi1_pins { 159*4882a593Smuzhiyun pinctrl-single,pins = < 160*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ 161*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ 162*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ 163*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ 164*4882a593Smuzhiyun >; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun hsusb_otg_pins: pinmux_hsusb_otg_pins { 167*4882a593Smuzhiyun pinctrl-single,pins = < 168*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 169*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 170*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 171*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ 174*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 175*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 176*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ 177*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ 178*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ 179*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ 180*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 181*4882a593Smuzhiyun >; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun}; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun&uart2 { 186*4882a593Smuzhiyun interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; 187*4882a593Smuzhiyun pinctrl-names = "default"; 188*4882a593Smuzhiyun pinctrl-0 = <&uart2_pins>; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&mcspi1 { 192*4882a593Smuzhiyun pinctrl-names = "default"; 193*4882a593Smuzhiyun pinctrl-0 = <&mcspi1_pins>; 194*4882a593Smuzhiyun}; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun&omap3_pmx_core2 { 197*4882a593Smuzhiyun mmc3_core2_pins: pinmux_mmc3_core2_pins { 198*4882a593Smuzhiyun pinctrl-single,pins = < 199*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */ 200*4882a593Smuzhiyun OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */ 201*4882a593Smuzhiyun >; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun}; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun#include "twl4030.dtsi" 206*4882a593Smuzhiyun#include "twl4030_omap3.dtsi" 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&twl { 209*4882a593Smuzhiyun twl_power: power { 210*4882a593Smuzhiyun compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle"; 211*4882a593Smuzhiyun ti,use_poweroff; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun}; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun&twl_gpio { 216*4882a593Smuzhiyun ti,use-leds; 217*4882a593Smuzhiyun}; 218