xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
3*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
4*4882a593Smuzhiyun * published by the Free Software Foundation.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include "omap36xx.dtsi"
10*4882a593Smuzhiyun#include "logicpd-torpedo-som.dtsi"
11*4882a593Smuzhiyun#include "omap-gpmc-smsc9221.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "LogicPD Zoom DM3730 Torpedo + Wireless Development Kit";
15*4882a593Smuzhiyun	compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		stdout-path = &uart1;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	gpio_keys {
22*4882a593Smuzhiyun		compatible = "gpio-keys";
23*4882a593Smuzhiyun		pinctrl-names = "default";
24*4882a593Smuzhiyun		pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		sysboot2 {
27*4882a593Smuzhiyun			label = "sysboot2";
28*4882a593Smuzhiyun			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;	/* gpio2 */
29*4882a593Smuzhiyun			linux,code = <BTN_0>;
30*4882a593Smuzhiyun			wakeup-source;
31*4882a593Smuzhiyun		};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun		sysboot5 {
34*4882a593Smuzhiyun			label = "sysboot5";
35*4882a593Smuzhiyun			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;	/* gpio7 */
36*4882a593Smuzhiyun			linux,code = <BTN_1>;
37*4882a593Smuzhiyun			wakeup-source;
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		gpio1 {
41*4882a593Smuzhiyun			label = "gpio1";
42*4882a593Smuzhiyun			gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;	/* gpio181 */
43*4882a593Smuzhiyun			linux,code = <BTN_2>;
44*4882a593Smuzhiyun			wakeup-source;
45*4882a593Smuzhiyun		};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		gpio2 {
48*4882a593Smuzhiyun			label = "gpio2";
49*4882a593Smuzhiyun			gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;	/* gpio178 */
50*4882a593Smuzhiyun			linux,code = <BTN_3>;
51*4882a593Smuzhiyun			wakeup-source;
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun	};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	sound {
56*4882a593Smuzhiyun		compatible = "ti,omap-twl4030";
57*4882a593Smuzhiyun		ti,model = "omap3logic";
58*4882a593Smuzhiyun		ti,mcbsp = <&mcbsp2>;
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	leds {
62*4882a593Smuzhiyun		compatible = "gpio-leds";
63*4882a593Smuzhiyun		pinctrl-names = "default";
64*4882a593Smuzhiyun		pinctrl-0 = <&led_pins>;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		led1 {
67*4882a593Smuzhiyun			label = "led1";
68*4882a593Smuzhiyun			gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;	/* gpio180 */
69*4882a593Smuzhiyun			linux,default-trigger = "cpu0";
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		led2 {
73*4882a593Smuzhiyun			label = "led2";
74*4882a593Smuzhiyun			gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;	/* gpio179 */
75*4882a593Smuzhiyun			linux,default-trigger = "none";
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	pwm10: dmtimer-pwm {
80*4882a593Smuzhiyun		compatible = "ti,omap-dmtimer-pwm";
81*4882a593Smuzhiyun		pinctrl-names = "default";
82*4882a593Smuzhiyun		pinctrl-0 = <&pwm_pins>;
83*4882a593Smuzhiyun		ti,timers = <&timer10>;
84*4882a593Smuzhiyun		#pwm-cells = <3>;
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&vaux1 {
90*4882a593Smuzhiyun	regulator-min-microvolt = <3000000>;
91*4882a593Smuzhiyun	regulator-max-microvolt = <3000000>;
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&vaux4 {
95*4882a593Smuzhiyun	regulator-min-microvolt = <1800000>;
96*4882a593Smuzhiyun	regulator-max-microvolt = <1800000>;
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&mcbsp2 {
100*4882a593Smuzhiyun	status = "okay";
101*4882a593Smuzhiyun};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun&charger {
104*4882a593Smuzhiyun	ti,bb-uvolt = <3200000>;
105*4882a593Smuzhiyun	ti,bb-uamp = <150>;
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&gpmc {
109*4882a593Smuzhiyun	ranges = <0 0 0x30000000 0x1000000	/* CS0: 16MB for NAND */
110*4882a593Smuzhiyun		  1 0 0x2c000000 0x1000000>;	/* CS1: 16MB for LAN9221 */
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	ethernet@gpmc {
113*4882a593Smuzhiyun		pinctrl-names = "default";
114*4882a593Smuzhiyun		pinctrl-0 = <&lan9221_pins>;
115*4882a593Smuzhiyun		interrupt-parent = <&gpio5>;
116*4882a593Smuzhiyun		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;		/* gpio129 */
117*4882a593Smuzhiyun		reg = <1 0 0xff>;
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun&vpll2 {
122*4882a593Smuzhiyun	regulator-always-on;
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&dss {
126*4882a593Smuzhiyun	status = "ok";
127*4882a593Smuzhiyun	vdds_dsi-supply = <&vpll2>;
128*4882a593Smuzhiyun	vdda_video-supply = <&video_reg>;
129*4882a593Smuzhiyun	pinctrl-names = "default";
130*4882a593Smuzhiyun	pinctrl-0 = <&dss_dpi_pins1>;
131*4882a593Smuzhiyun	port {
132*4882a593Smuzhiyun		dpi_out: endpoint {
133*4882a593Smuzhiyun			remote-endpoint = <&lcd_in>;
134*4882a593Smuzhiyun			data-lines = <16>;
135*4882a593Smuzhiyun		};
136*4882a593Smuzhiyun	};
137*4882a593Smuzhiyun};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun/ {
140*4882a593Smuzhiyun	aliases {
141*4882a593Smuzhiyun		display0 = &lcd0;
142*4882a593Smuzhiyun	};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun	video_reg: video_reg {
145*4882a593Smuzhiyun		pinctrl-names = "default";
146*4882a593Smuzhiyun		pinctrl-0 = <&panel_pwr_pins>;
147*4882a593Smuzhiyun		compatible = "regulator-fixed";
148*4882a593Smuzhiyun		regulator-name = "fixed-supply";
149*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
150*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
151*4882a593Smuzhiyun		gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>;	/* gpio155, lcd INI */
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	lcd0: display {
155*4882a593Smuzhiyun		compatible = "panel-dpi";
156*4882a593Smuzhiyun		label = "15";
157*4882a593Smuzhiyun		status = "okay";
158*4882a593Smuzhiyun		/* default-on; */
159*4882a593Smuzhiyun		pinctrl-names = "default";
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		port {
162*4882a593Smuzhiyun			lcd_in: endpoint {
163*4882a593Smuzhiyun				remote-endpoint = <&dpi_out>;
164*4882a593Smuzhiyun			};
165*4882a593Smuzhiyun		};
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun		panel-timing {
168*4882a593Smuzhiyun			clock-frequency = <9000000>;
169*4882a593Smuzhiyun			hactive = <480>;
170*4882a593Smuzhiyun			vactive = <272>;
171*4882a593Smuzhiyun			hfront-porch = <3>;
172*4882a593Smuzhiyun			hback-porch = <2>;
173*4882a593Smuzhiyun			hsync-len = <42>;
174*4882a593Smuzhiyun			vback-porch = <3>;
175*4882a593Smuzhiyun			vfront-porch = <4>;
176*4882a593Smuzhiyun			vsync-len = <11>;
177*4882a593Smuzhiyun			hsync-active = <0>;
178*4882a593Smuzhiyun			vsync-active = <0>;
179*4882a593Smuzhiyun			de-active = <1>;
180*4882a593Smuzhiyun			pixelclk-active = <1>;
181*4882a593Smuzhiyun		};
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	bl: backlight {
185*4882a593Smuzhiyun		compatible = "pwm-backlight";
186*4882a593Smuzhiyun		pinctrl-names = "default";
187*4882a593Smuzhiyun		pinctrl-0 = <&backlight_pins>;
188*4882a593Smuzhiyun		pwms = <&pwm10 0 5000000 0>;
189*4882a593Smuzhiyun		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
190*4882a593Smuzhiyun		default-brightness-level = <7>;
191*4882a593Smuzhiyun		enable-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&mmc1 {
196*4882a593Smuzhiyun	interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
197*4882a593Smuzhiyun	pinctrl-names = "default";
198*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins &mmc1_cd>;
199*4882a593Smuzhiyun	vmmc-supply = <&vmmc1>;
200*4882a593Smuzhiyun	bus-width = <4>;
201*4882a593Smuzhiyun	cap-power-off-card;
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&mmc2 {
205*4882a593Smuzhiyun	status = "disabled";
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&omap3_pmx_core {
209*4882a593Smuzhiyun	gpio_key_pins: pinmux_gpio_key_pins {
210*4882a593Smuzhiyun		pinctrl-single,pins = <
211*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_clk.gpio_178 */
212*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_cs0.gpio_181 */
213*4882a593Smuzhiyun		>;
214*4882a593Smuzhiyun	};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun	pwm_pins: pinmux_pwm_pins {
217*4882a593Smuzhiyun		pinctrl-single,pins = <
218*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3)       /* gpmc_ncs5.gpt_10_pwm_evt */
219*4882a593Smuzhiyun		>;
220*4882a593Smuzhiyun	};
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun	led_pins: pinmux_led_pins {
223*4882a593Smuzhiyun		pinctrl-single,pins = <
224*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4)	/* gpio_179 */
225*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21da, PIN_OUTPUT | MUX_MODE4)	/* gpio_180 */
226*4882a593Smuzhiyun		>;
227*4882a593Smuzhiyun	};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun	mmc1_pins: pinmux_mmc1_pins {
230*4882a593Smuzhiyun		pinctrl-single,pins = <
231*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
232*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
233*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
234*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
235*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
236*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
237*4882a593Smuzhiyun		>;
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun	tsc2004_pins: pinmux_tsc2004_pins {
241*4882a593Smuzhiyun		pinctrl-single,pins = <
242*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)	/* mcbsp4_dr.gpio_153 */
243*4882a593Smuzhiyun		>;
244*4882a593Smuzhiyun	};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun	backlight_pins: pinmux_backlight_pins {
247*4882a593Smuzhiyun		pinctrl-single,pins = <
248*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_dx.gpio_154 */
249*4882a593Smuzhiyun		>;
250*4882a593Smuzhiyun	};
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun	isp_pins: pinmux_isp_pins {
253*4882a593Smuzhiyun		pinctrl-single,pins = <
254*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0)   /* cam_hs.cam_hs */
255*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0)   /* cam_vs.cam_vs */
256*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0)   /* cam_xclka.cam_xclka */
257*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0)   /* cam_pclk.cam_pclk */
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE0)   /* cam_d0.cam_d0 */
260*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0)   /* cam_d1.cam_d1 */
261*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0)   /* cam_d2.cam_d2 */
262*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0)   /* cam_d3.cam_d3 */
263*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0)   /* cam_d4.cam_d4 */
264*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0)   /* cam_d5.cam_d5 */
265*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)   /* cam_d6.cam_d6 */
266*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)   /* cam_d7.cam_d7 */
267*4882a593Smuzhiyun		>;
268*4882a593Smuzhiyun	};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun	panel_pwr_pins: pinmux_panel_pwr_pins {
271*4882a593Smuzhiyun		pinctrl-single,pins = <
272*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_fs.gpio_155 */
273*4882a593Smuzhiyun		>;
274*4882a593Smuzhiyun	};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun	dss_dpi_pins1: pinmux_dss_dpi_pins1 {
277*4882a593Smuzhiyun		pinctrl-single,pins = <
278*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_pclk.dss_pclk */
279*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_hsync.dss_hsync */
280*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_vsync.dss_vsync */
281*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_acbias.dss_acbias */
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data6.dss_data6 */
284*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data7.dss_data7 */
285*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data8.dss_data8 */
286*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data9.dss_data9 */
287*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data10.dss_data10 */
288*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data11.dss_data11 */
289*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data12.dss_data12 */
290*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data13.dss_data13 */
291*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data14.dss_data14 */
292*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data15.dss_data15 */
293*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data16.dss_data16 */
294*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data17.dss_data17 */
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data18.dss_data0 */
297*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data19.dss_data1 */
298*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data20.dss_data2 */
299*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data21.dss_data3 */
300*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data22.dss_data4 */
301*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data23.dss_data5 */
302*4882a593Smuzhiyun		>;
303*4882a593Smuzhiyun	};
304*4882a593Smuzhiyun};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun&omap3_pmx_wkup {
307*4882a593Smuzhiyun	gpio_key_pins_wkup: pinmux_gpio_key_pins_wkup {
308*4882a593Smuzhiyun		pinctrl-single,pins = <
309*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot0.gpio_2 */
310*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot5.gpio_7 */
311*4882a593Smuzhiyun		>;
312*4882a593Smuzhiyun	};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun	lan9221_pins: pinmux_lan9221_pins {
315*4882a593Smuzhiyun		pinctrl-single,pins = <
316*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)		/* reserved.gpio_129 */
317*4882a593Smuzhiyun		>;
318*4882a593Smuzhiyun	};
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun	mmc1_cd: pinmux_mmc1_cd {
321*4882a593Smuzhiyun		pinctrl-single,pins = <
322*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4)	/* reserved.gpio_127 */
323*4882a593Smuzhiyun		>;
324*4882a593Smuzhiyun	};
325*4882a593Smuzhiyun};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun&i2c2 {
328*4882a593Smuzhiyun	mt9p031@48 {
329*4882a593Smuzhiyun		compatible = "aptina,mt9p031";
330*4882a593Smuzhiyun		reg = <0x48>;
331*4882a593Smuzhiyun		clocks = <&isp 0>;
332*4882a593Smuzhiyun		vaa-supply = <&vaux4>;
333*4882a593Smuzhiyun		vdd-supply = <&vaux4>;
334*4882a593Smuzhiyun		vdd_io-supply = <&vaux4>;
335*4882a593Smuzhiyun		port {
336*4882a593Smuzhiyun			mt9p031_out: endpoint {
337*4882a593Smuzhiyun				input-clock-frequency = <24000000>;
338*4882a593Smuzhiyun				pixel-clock-frequency = <72000000>;
339*4882a593Smuzhiyun				remote-endpoint = <&ccdc_ep>;
340*4882a593Smuzhiyun			};
341*4882a593Smuzhiyun		};
342*4882a593Smuzhiyun	};
343*4882a593Smuzhiyun};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun&i2c3 {
346*4882a593Smuzhiyun	touchscreen: tsc2004@48 {
347*4882a593Smuzhiyun		compatible = "ti,tsc2004";
348*4882a593Smuzhiyun		reg = <0x48>;
349*4882a593Smuzhiyun		vio-supply = <&vaux1>;
350*4882a593Smuzhiyun		pinctrl-names = "default";
351*4882a593Smuzhiyun		pinctrl-0 = <&tsc2004_pins>;
352*4882a593Smuzhiyun		interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun		touchscreen-fuzz-x = <4>;
355*4882a593Smuzhiyun		touchscreen-fuzz-y = <7>;
356*4882a593Smuzhiyun		touchscreen-fuzz-pressure = <2>;
357*4882a593Smuzhiyun		touchscreen-size-x = <4096>;
358*4882a593Smuzhiyun		touchscreen-size-y = <4096>;
359*4882a593Smuzhiyun		touchscreen-max-pressure = <2048>;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun		ti,x-plate-ohms = <280>;
362*4882a593Smuzhiyun		ti,esd-recovery-timeout-ms = <8000>;
363*4882a593Smuzhiyun	};
364*4882a593Smuzhiyun};
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun&mcspi1 {
367*4882a593Smuzhiyun	at25@0 {
368*4882a593Smuzhiyun		compatible = "atmel,at25";
369*4882a593Smuzhiyun		reg = <0>;
370*4882a593Smuzhiyun		spi-max-frequency = <5000000>;
371*4882a593Smuzhiyun		spi-cpha;
372*4882a593Smuzhiyun		spi-cpol;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun		pagesize = <64>;
375*4882a593Smuzhiyun		size = <32768>;
376*4882a593Smuzhiyun		address-width = <16>;
377*4882a593Smuzhiyun	};
378*4882a593Smuzhiyun};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun&isp {
381*4882a593Smuzhiyun	pinctrl-names = "default";
382*4882a593Smuzhiyun	pinctrl-0 = <&isp_pins>;
383*4882a593Smuzhiyun	ports {
384*4882a593Smuzhiyun		port@0 {
385*4882a593Smuzhiyun			reg = <0>;
386*4882a593Smuzhiyun			ccdc_ep: endpoint {
387*4882a593Smuzhiyun				remote-endpoint = <&mt9p031_out>;
388*4882a593Smuzhiyun				bus-width = <8>;
389*4882a593Smuzhiyun				hsync-active = <1>;
390*4882a593Smuzhiyun				vsync-active = <1>;
391*4882a593Smuzhiyun				pclk-sample = <0>;
392*4882a593Smuzhiyun			};
393*4882a593Smuzhiyun		};
394*4882a593Smuzhiyun	};
395*4882a593Smuzhiyun};
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun&uart1 {
398*4882a593Smuzhiyun	interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
399*4882a593Smuzhiyun};
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
402*4882a593Smuzhiyun&usb_otg_hs {
403*4882a593Smuzhiyun	pinctrl-names = "default";
404*4882a593Smuzhiyun	pinctrl-0 = <&hsusb_otg_pins>;
405*4882a593Smuzhiyun	interface-type = <0>;
406*4882a593Smuzhiyun	usb-phy = <&usb2_phy>;
407*4882a593Smuzhiyun	phys = <&usb2_phy>;
408*4882a593Smuzhiyun	phy-names = "usb2-phy";
409*4882a593Smuzhiyun	mode = <3>;
410*4882a593Smuzhiyun	power = <50>;
411*4882a593Smuzhiyun};
412