xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/keystone-k2l.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2014 Texas Instruments, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Keystone 2 Lamarr SoC specific device tree
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
7*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
8*4882a593Smuzhiyun * published by the Free Software Foundation.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	cpus {
13*4882a593Smuzhiyun		#address-cells = <1>;
14*4882a593Smuzhiyun		#size-cells = <0>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun		interrupt-parent = <&gic>;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun		cpu@0 {
19*4882a593Smuzhiyun			compatible = "arm,cortex-a15";
20*4882a593Smuzhiyun			device_type = "cpu";
21*4882a593Smuzhiyun			reg = <0>;
22*4882a593Smuzhiyun		};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		cpu@1 {
25*4882a593Smuzhiyun			compatible = "arm,cortex-a15";
26*4882a593Smuzhiyun			device_type = "cpu";
27*4882a593Smuzhiyun			reg = <1>;
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	soc {
32*4882a593Smuzhiyun		/include/ "keystone-k2l-clocks.dtsi"
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		uart2: serial@02348400 {
35*4882a593Smuzhiyun			compatible = "ns16550a";
36*4882a593Smuzhiyun			current-speed = <115200>;
37*4882a593Smuzhiyun			reg-shift = <2>;
38*4882a593Smuzhiyun			reg-io-width = <4>;
39*4882a593Smuzhiyun			reg = <0x02348400 0x100>;
40*4882a593Smuzhiyun			clocks	= <&clkuart2>;
41*4882a593Smuzhiyun			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		uart3:	serial@02348800 {
45*4882a593Smuzhiyun			compatible = "ns16550a";
46*4882a593Smuzhiyun			current-speed = <115200>;
47*4882a593Smuzhiyun			reg-shift = <2>;
48*4882a593Smuzhiyun			reg-io-width = <4>;
49*4882a593Smuzhiyun			reg = <0x02348800 0x100>;
50*4882a593Smuzhiyun			clocks	= <&clkuart3>;
51*4882a593Smuzhiyun			interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		dspgpio0: keystone_dsp_gpio@02620240 {
55*4882a593Smuzhiyun			compatible = "ti,keystone-dsp-gpio";
56*4882a593Smuzhiyun			gpio-controller;
57*4882a593Smuzhiyun			#gpio-cells = <2>;
58*4882a593Smuzhiyun			gpio,syscon-dev = <&devctrl 0x240>;
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun		dspgpio1: keystone_dsp_gpio@2620244 {
62*4882a593Smuzhiyun			compatible = "ti,keystone-dsp-gpio";
63*4882a593Smuzhiyun			gpio-controller;
64*4882a593Smuzhiyun			#gpio-cells = <2>;
65*4882a593Smuzhiyun			gpio,syscon-dev = <&devctrl 0x244>;
66*4882a593Smuzhiyun		};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		dspgpio2: keystone_dsp_gpio@2620248 {
69*4882a593Smuzhiyun			compatible = "ti,keystone-dsp-gpio";
70*4882a593Smuzhiyun			gpio-controller;
71*4882a593Smuzhiyun			#gpio-cells = <2>;
72*4882a593Smuzhiyun			gpio,syscon-dev = <&devctrl 0x248>;
73*4882a593Smuzhiyun		};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		dspgpio3: keystone_dsp_gpio@262024c {
76*4882a593Smuzhiyun			compatible = "ti,keystone-dsp-gpio";
77*4882a593Smuzhiyun			gpio-controller;
78*4882a593Smuzhiyun			#gpio-cells = <2>;
79*4882a593Smuzhiyun			gpio,syscon-dev = <&devctrl 0x24c>;
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		mdio: mdio@26200f00 {
83*4882a593Smuzhiyun			compatible	= "ti,keystone_mdio", "ti,davinci_mdio";
84*4882a593Smuzhiyun			#address-cells = <1>;
85*4882a593Smuzhiyun			#size-cells = <0>;
86*4882a593Smuzhiyun			reg = <0x26200f00 0x100>;
87*4882a593Smuzhiyun			status = "disabled";
88*4882a593Smuzhiyun			clocks = <&clkcpgmac>;
89*4882a593Smuzhiyun			clock-names = "fck";
90*4882a593Smuzhiyun			bus_freq	= <2500000>;
91*4882a593Smuzhiyun		};
92*4882a593Smuzhiyun		/include/ "keystone-k2l-netcp.dtsi"
93*4882a593Smuzhiyun	};
94*4882a593Smuzhiyun};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun&spi0 {
97*4882a593Smuzhiyun       ti,davinci-spi-num-cs = <5>;
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&spi1 {
101*4882a593Smuzhiyun       ti,davinci-spi-num-cs = <3>;
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&spi2 {
105*4882a593Smuzhiyun       ti,davinci-spi-num-cs = <5>;
106*4882a593Smuzhiyun       /* Pin muxed. Enabled and configured by Bootloader */
107*4882a593Smuzhiyun       status = "disabled";
108*4882a593Smuzhiyun};
109