1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2014 Texas Instruments, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Device Tree Source for K2G SOC 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 7*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 8*4882a593Smuzhiyun * published by the Free Software Foundation. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Texas Instruments K2G SoC"; 15*4882a593Smuzhiyun #address-cells = <1>; 16*4882a593Smuzhiyun #size-cells = <1>; 17*4882a593Smuzhiyun interrupt-parent = <&gic>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun chosen { }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun aliases { 22*4882a593Smuzhiyun serial0 = &uart0; 23*4882a593Smuzhiyun spi0 = &spi0; 24*4882a593Smuzhiyun spi1 = &spi1; 25*4882a593Smuzhiyun spi2 = &spi2; 26*4882a593Smuzhiyun spi3 = &spi3; 27*4882a593Smuzhiyun spi4 = &qspi; 28*4882a593Smuzhiyun i2c0 = &i2c0; 29*4882a593Smuzhiyun i2c1 = &i2c1; 30*4882a593Smuzhiyun i2c2 = &i2c2; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun cpus { 34*4882a593Smuzhiyun #address-cells = <1>; 35*4882a593Smuzhiyun #size-cells = <0>; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun interrupt-parent = <&gic>; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun cpu@0 { 40*4882a593Smuzhiyun compatible = "arm,cortex-a15"; 41*4882a593Smuzhiyun device_type = "cpu"; 42*4882a593Smuzhiyun reg = <0>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun gic: interrupt-controller { 47*4882a593Smuzhiyun compatible = "arm,cortex-a15-gic"; 48*4882a593Smuzhiyun #interrupt-cells = <3>; 49*4882a593Smuzhiyun interrupt-controller; 50*4882a593Smuzhiyun reg = <0x0 0x02561000 0x0 0x1000>, 51*4882a593Smuzhiyun <0x0 0x02562000 0x0 0x2000>, 52*4882a593Smuzhiyun <0x0 0x02564000 0x0 0x1000>, 53*4882a593Smuzhiyun <0x0 0x02566000 0x0 0x2000>; 54*4882a593Smuzhiyun interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 55*4882a593Smuzhiyun IRQ_TYPE_LEVEL_HIGH)>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun soc { 59*4882a593Smuzhiyun #address-cells = <1>; 60*4882a593Smuzhiyun #size-cells = <1>; 61*4882a593Smuzhiyun compatible = "ti,keystone","simple-bus"; 62*4882a593Smuzhiyun interrupt-parent = <&gic>; 63*4882a593Smuzhiyun ranges; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun uart0: serial@02530c00 { 66*4882a593Smuzhiyun compatible = "ns16550a"; 67*4882a593Smuzhiyun current-speed = <115200>; 68*4882a593Smuzhiyun reg-shift = <2>; 69*4882a593Smuzhiyun reg-io-width = <4>; 70*4882a593Smuzhiyun reg = <0x02530c00 0x100>; 71*4882a593Smuzhiyun clock-names = "uart"; 72*4882a593Smuzhiyun interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun mdio: mdio@4200f00 { 76*4882a593Smuzhiyun compatible = "ti,keystone_mdio", "ti,davinci_mdio"; 77*4882a593Smuzhiyun #address-cells = <1>; 78*4882a593Smuzhiyun #size-cells = <0>; 79*4882a593Smuzhiyun /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ 80*4882a593Smuzhiyun /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ 81*4882a593Smuzhiyun clock-names = "fck"; 82*4882a593Smuzhiyun reg = <0x04200f00 0x100>; 83*4882a593Smuzhiyun status = "disabled"; 84*4882a593Smuzhiyun bus_freq = <2500000>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun qspi: qspi@2940000 { 88*4882a593Smuzhiyun compatible = "cadence,qspi"; 89*4882a593Smuzhiyun #address-cells = <1>; 90*4882a593Smuzhiyun #size-cells = <0>; 91*4882a593Smuzhiyun reg = <0x02940000 0x1000>, 92*4882a593Smuzhiyun <0x24000000 0x4000000>; 93*4882a593Smuzhiyun interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; 94*4882a593Smuzhiyun num-cs = <4>; 95*4882a593Smuzhiyun fifo-depth = <256>; 96*4882a593Smuzhiyun sram-size = <256>; 97*4882a593Smuzhiyun status = "disabled"; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #include "keystone-k2g-netcp.dtsi" 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun pmmc: pmmc@2900000 { 103*4882a593Smuzhiyun compatible = "ti,power-processor"; 104*4882a593Smuzhiyun reg = <0x02900000 0x40000>; 105*4882a593Smuzhiyun ti,lpsc_module = <1>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun spi0: spi@21805400 { 109*4882a593Smuzhiyun compatible = "ti,keystone-spi", "ti,dm6441-spi"; 110*4882a593Smuzhiyun reg = <0x21805400 0x200>; 111*4882a593Smuzhiyun num-cs = <4>; 112*4882a593Smuzhiyun ti,davinci-spi-intr-line = <0>; 113*4882a593Smuzhiyun interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; 114*4882a593Smuzhiyun #address-cells = <1>; 115*4882a593Smuzhiyun #size-cells = <0>; 116*4882a593Smuzhiyun status = "disabled"; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun spi1: spi@21805800 { 120*4882a593Smuzhiyun compatible = "ti,keystone-spi", "ti,dm6441-spi"; 121*4882a593Smuzhiyun reg = <0x21805800 0x200>; 122*4882a593Smuzhiyun num-cs = <4>; 123*4882a593Smuzhiyun ti,davinci-spi-intr-line = <0>; 124*4882a593Smuzhiyun interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; 125*4882a593Smuzhiyun #address-cells = <1>; 126*4882a593Smuzhiyun #size-cells = <0>; 127*4882a593Smuzhiyun status = "disabled"; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun spi2: spi@21805c00 { 131*4882a593Smuzhiyun compatible = "ti,keystone-spi", "ti,dm6441-spi"; 132*4882a593Smuzhiyun reg = <0x21805C00 0x200>; 133*4882a593Smuzhiyun num-cs = <4>; 134*4882a593Smuzhiyun ti,davinci-spi-intr-line = <0>; 135*4882a593Smuzhiyun interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 136*4882a593Smuzhiyun #address-cells = <1>; 137*4882a593Smuzhiyun #size-cells = <0>; 138*4882a593Smuzhiyun status = "disabled"; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun spi3: spi@21806000 { 142*4882a593Smuzhiyun compatible = "ti,keystone-spi", "ti,dm6441-spi"; 143*4882a593Smuzhiyun reg = <0x21806000 0x200>; 144*4882a593Smuzhiyun num-cs = <4>; 145*4882a593Smuzhiyun ti,davinci-spi-intr-line = <0>; 146*4882a593Smuzhiyun interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; 147*4882a593Smuzhiyun #address-cells = <1>; 148*4882a593Smuzhiyun #size-cells = <0>; 149*4882a593Smuzhiyun status = "disabled"; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun i2c0: i2c@2530000 { 152*4882a593Smuzhiyun compatible = "ti,keystone-i2c"; 153*4882a593Smuzhiyun reg = <0x02530000 0x400>; 154*4882a593Smuzhiyun clock-frequency = <100000>; 155*4882a593Smuzhiyun interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 156*4882a593Smuzhiyun #address-cells = <1>; 157*4882a593Smuzhiyun #size-cells = <0>; 158*4882a593Smuzhiyun status = "disabled"; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun i2c1: i2c@2530400 { 162*4882a593Smuzhiyun compatible = "ti,keystone-i2c"; 163*4882a593Smuzhiyun reg = <0x02530400 0x400>; 164*4882a593Smuzhiyun clock-frequency = <100000>; 165*4882a593Smuzhiyun interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 166*4882a593Smuzhiyun #address-cells = <1>; 167*4882a593Smuzhiyun #size-cells = <0>; 168*4882a593Smuzhiyun status = "disabled"; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun i2c2: i2c@2530800 { 172*4882a593Smuzhiyun compatible = "ti,keystone-i2c"; 173*4882a593Smuzhiyun reg = <0x02530800 0x400>; 174*4882a593Smuzhiyun clock-frequency = <100000>; 175*4882a593Smuzhiyun interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 176*4882a593Smuzhiyun #address-cells = <1>; 177*4882a593Smuzhiyun #size-cells = <0>; 178*4882a593Smuzhiyun status = "disabled"; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun mmc0: mmc@23000000 { 182*4882a593Smuzhiyun compatible = "ti,omap4-hsmmc"; 183*4882a593Smuzhiyun reg = <0x23000000 0x400>; 184*4882a593Smuzhiyun interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; 185*4882a593Smuzhiyun bus-width = <4>; 186*4882a593Smuzhiyun ti,needs-special-reset; 187*4882a593Smuzhiyun no-1-8-v; 188*4882a593Smuzhiyun max-frequency = <96000000>; 189*4882a593Smuzhiyun status = "disabled"; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun mmc1: mmc@23100000 { 193*4882a593Smuzhiyun compatible = "ti,omap4-hsmmc"; 194*4882a593Smuzhiyun reg = <0x23100000 0x400>; 195*4882a593Smuzhiyun interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; 196*4882a593Smuzhiyun bus-width = <8>; 197*4882a593Smuzhiyun ti,needs-special-reset; 198*4882a593Smuzhiyun ti,non-removable; 199*4882a593Smuzhiyun max-frequency = <96000000>; 200*4882a593Smuzhiyun status = "disabled"; 201*4882a593Smuzhiyun clock-names = "fck"; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun}; 205