1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright 2013-2014 Texas Instruments, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Keystone 2 Edison EVM device tree 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 7*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 8*4882a593Smuzhiyun * published by the Free Software Foundation. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun/dts-v1/; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun#include "keystone.dtsi" 13*4882a593Smuzhiyun#include "keystone-k2e.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun compatible = "ti,k2e-evm","ti,keystone"; 17*4882a593Smuzhiyun model = "Texas Instruments Keystone 2 Edison EVM"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun soc { 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun clocks { 22*4882a593Smuzhiyun refclksys: refclksys { 23*4882a593Smuzhiyun #clock-cells = <0>; 24*4882a593Smuzhiyun compatible = "fixed-clock"; 25*4882a593Smuzhiyun clock-frequency = <100000000>; 26*4882a593Smuzhiyun clock-output-names = "refclk-sys"; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun refclkpass: refclkpass { 30*4882a593Smuzhiyun #clock-cells = <0>; 31*4882a593Smuzhiyun compatible = "fixed-clock"; 32*4882a593Smuzhiyun clock-frequency = <100000000>; 33*4882a593Smuzhiyun clock-output-names = "refclk-pass"; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun refclkddr3a: refclkddr3a { 37*4882a593Smuzhiyun #clock-cells = <0>; 38*4882a593Smuzhiyun compatible = "fixed-clock"; 39*4882a593Smuzhiyun clock-frequency = <100000000>; 40*4882a593Smuzhiyun clock-output-names = "refclk-ddr3a"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&usb_phy { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&usb { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&usb1_phy { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&usb1 { 59*4882a593Smuzhiyun status = "okay"; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&i2c0 { 63*4882a593Smuzhiyun dtt@50 { 64*4882a593Smuzhiyun compatible = "at,24c1024"; 65*4882a593Smuzhiyun reg = <0x50>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&aemif { 70*4882a593Smuzhiyun cs0 { 71*4882a593Smuzhiyun #address-cells = <2>; 72*4882a593Smuzhiyun #size-cells = <1>; 73*4882a593Smuzhiyun clock-ranges; 74*4882a593Smuzhiyun ranges; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun ti,cs-chipselect = <0>; 77*4882a593Smuzhiyun /* all timings in nanoseconds */ 78*4882a593Smuzhiyun ti,cs-min-turnaround-ns = <12>; 79*4882a593Smuzhiyun ti,cs-read-hold-ns = <6>; 80*4882a593Smuzhiyun ti,cs-read-strobe-ns = <23>; 81*4882a593Smuzhiyun ti,cs-read-setup-ns = <9>; 82*4882a593Smuzhiyun ti,cs-write-hold-ns = <8>; 83*4882a593Smuzhiyun ti,cs-write-strobe-ns = <23>; 84*4882a593Smuzhiyun ti,cs-write-setup-ns = <8>; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun nand@0,0 { 87*4882a593Smuzhiyun compatible = "ti,keystone-nand","ti,davinci-nand"; 88*4882a593Smuzhiyun #address-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <1>; 90*4882a593Smuzhiyun reg = <0 0 0x4000000 91*4882a593Smuzhiyun 1 0 0x0000100>; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun ti,davinci-chipselect = <0>; 94*4882a593Smuzhiyun ti,davinci-mask-ale = <0x2000>; 95*4882a593Smuzhiyun ti,davinci-mask-cle = <0x4000>; 96*4882a593Smuzhiyun ti,davinci-mask-chipsel = <0>; 97*4882a593Smuzhiyun nand-ecc-mode = "hw"; 98*4882a593Smuzhiyun ti,davinci-ecc-bits = <4>; 99*4882a593Smuzhiyun nand-on-flash-bbt; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun partition@0 { 102*4882a593Smuzhiyun label = "u-boot"; 103*4882a593Smuzhiyun reg = <0x0 0x100000>; 104*4882a593Smuzhiyun read-only; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun partition@100000 { 108*4882a593Smuzhiyun label = "params"; 109*4882a593Smuzhiyun reg = <0x100000 0x80000>; 110*4882a593Smuzhiyun read-only; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun partition@180000 { 114*4882a593Smuzhiyun label = "ubifs"; 115*4882a593Smuzhiyun reg = <0x180000 0x1FE80000>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun}; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun&spi0 { 122*4882a593Smuzhiyun status = "okay"; 123*4882a593Smuzhiyun nor_flash: n25q128a11@0 { 124*4882a593Smuzhiyun #address-cells = <1>; 125*4882a593Smuzhiyun #size-cells = <1>; 126*4882a593Smuzhiyun compatible = "Micron,n25q128a11", "spi-flash"; 127*4882a593Smuzhiyun spi-max-frequency = <54000000>; 128*4882a593Smuzhiyun m25p,fast-read; 129*4882a593Smuzhiyun reg = <0>; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun partition@0 { 132*4882a593Smuzhiyun label = "u-boot-spl"; 133*4882a593Smuzhiyun reg = <0x0 0x80000>; 134*4882a593Smuzhiyun read-only; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun partition@1 { 138*4882a593Smuzhiyun label = "misc"; 139*4882a593Smuzhiyun reg = <0x80000 0xf80000>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun}; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun&mdio { 145*4882a593Smuzhiyun status = "ok"; 146*4882a593Smuzhiyun ethphy0: ethernet-phy@0 { 147*4882a593Smuzhiyun compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; 148*4882a593Smuzhiyun reg = <0>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun ethphy1: ethernet-phy@1 { 152*4882a593Smuzhiyun compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; 153*4882a593Smuzhiyun reg = <1>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun}; 156