1*4882a593Smuzhiyun #ifndef __DT_BINDINGS_POWER_DOMAIN_RK3288_H__ 2*4882a593Smuzhiyun #define __DT_BINDINGS_POWER_DOMAIN_RK3288_H__ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun /* RK3288 power domain index */ 5*4882a593Smuzhiyun #define RK3288_PD_GPU 0 6*4882a593Smuzhiyun #define RK3288_PD_VIO 1 7*4882a593Smuzhiyun #define RK3288_PD_VIDEO 2 8*4882a593Smuzhiyun #define RK3288_PD_HEVC 3 9*4882a593Smuzhiyun #define RK3288_PD_PERI 4 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #endif 12