1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This header provides constants specific to AM43XX pinctrl bindings. 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef _DT_BINDINGS_PINCTRL_AM43XX_H 6*4882a593Smuzhiyun #define _DT_BINDINGS_PINCTRL_AM43XX_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #define MUX_MODE0 0 9*4882a593Smuzhiyun #define MUX_MODE1 1 10*4882a593Smuzhiyun #define MUX_MODE2 2 11*4882a593Smuzhiyun #define MUX_MODE3 3 12*4882a593Smuzhiyun #define MUX_MODE4 4 13*4882a593Smuzhiyun #define MUX_MODE5 5 14*4882a593Smuzhiyun #define MUX_MODE6 6 15*4882a593Smuzhiyun #define MUX_MODE7 7 16*4882a593Smuzhiyun #define MUX_MODE8 8 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define PULL_DISABLE (1 << 16) 19*4882a593Smuzhiyun #define PULL_UP (1 << 17) 20*4882a593Smuzhiyun #define INPUT_EN (1 << 18) 21*4882a593Smuzhiyun #define SLEWCTRL_SLOW (1 << 19) 22*4882a593Smuzhiyun #define SLEWCTRL_FAST 0 23*4882a593Smuzhiyun #define DS0_PULL_UP_DOWN_EN (1 << 27) 24*4882a593Smuzhiyun #define WAKEUP_ENABLE (1 << 29) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define PIN_OUTPUT (PULL_DISABLE) 27*4882a593Smuzhiyun #define PIN_OUTPUT_PULLUP (PULL_UP) 28*4882a593Smuzhiyun #define PIN_OUTPUT_PULLDOWN 0 29*4882a593Smuzhiyun #define PIN_INPUT (INPUT_EN | PULL_DISABLE) 30*4882a593Smuzhiyun #define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) 31*4882a593Smuzhiyun #define PIN_INPUT_PULLDOWN (INPUT_EN) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* 34*4882a593Smuzhiyun * Macro to allow using the absolute physical address instead of the 35*4882a593Smuzhiyun * padconf registers instead of the offset from padconf base. 36*4882a593Smuzhiyun */ 37*4882a593Smuzhiyun #define AM4372_IOPAD(pa, val) (((pa) & 0xffff) - 0x0800) (val) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif 40