1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * This header provides constants for the ARM GIC. 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H 6*4882a593Smuzhiyun #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* interrupt specific cell 0 */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define GIC_SPI 0 13*4882a593Smuzhiyun #define GIC_PPI 1 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * Interrupt specifier cell 2. 17*4882a593Smuzhiyun * The flaggs in irq.h are valid, plus those below. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #define GIC_CPU_MASK_RAW(x) ((x) << 8) 20*4882a593Smuzhiyun #define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #endif 23