1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2014 MundoReader S.L. 3*4882a593Smuzhiyun * Author: Heiko Stuebner <heiko@sntech.de> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H 9*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <dt-bindings/clock/rk3188-cru-common.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* soft-reset indices */ 14*4882a593Smuzhiyun #define SRST_PTM_CORE2 0 15*4882a593Smuzhiyun #define SRST_PTM_CORE3 1 16*4882a593Smuzhiyun #define SRST_CORE2 5 17*4882a593Smuzhiyun #define SRST_CORE3 6 18*4882a593Smuzhiyun #define SRST_CORE2_DBG 10 19*4882a593Smuzhiyun #define SRST_CORE3_DBG 11 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define SRST_TIMER2 16 22*4882a593Smuzhiyun #define SRST_TIMER4 23 23*4882a593Smuzhiyun #define SRST_I2S0 24 24*4882a593Smuzhiyun #define SRST_TIMER5 25 25*4882a593Smuzhiyun #define SRST_TIMER3 29 26*4882a593Smuzhiyun #define SRST_TIMER6 31 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define SRST_PTM3 36 29*4882a593Smuzhiyun #define SRST_PTM3_ATB 37 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define SRST_GPS 67 32*4882a593Smuzhiyun #define SRST_HSICPHY 75 33*4882a593Smuzhiyun #define SRST_TIMER 78 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define SRST_PTM2 92 36*4882a593Smuzhiyun #define SRST_CORE2_WDT 94 37*4882a593Smuzhiyun #define SRST_CORE3_WDT 95 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define SRST_PTM2_ATB 111 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define SRST_HSIC 117 42*4882a593Smuzhiyun #define SRST_CTI2 118 43*4882a593Smuzhiyun #define SRST_CTI2_APB 119 44*4882a593Smuzhiyun #define SRST_GPU_BRIDGE 121 45*4882a593Smuzhiyun #define SRST_CTI3 123 46*4882a593Smuzhiyun #define SRST_CTI3_APB 124 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #endif 49