1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2014 MundoReader S.L. 3*4882a593Smuzhiyun * Author: Heiko Stuebner <heiko@sntech.de> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H 9*4882a593Smuzhiyun #define _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <dt-bindings/clock/rk3188-cru-common.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* soft-reset indices */ 14*4882a593Smuzhiyun #define SRST_SRST1 0 15*4882a593Smuzhiyun #define SRST_SRST2 1 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define SRST_L2MEM 18 18*4882a593Smuzhiyun #define SRST_I2S0 23 19*4882a593Smuzhiyun #define SRST_I2S1 24 20*4882a593Smuzhiyun #define SRST_I2S2 25 21*4882a593Smuzhiyun #define SRST_TIMER2 29 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define SRST_GPIO4 36 24*4882a593Smuzhiyun #define SRST_GPIO6 38 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define SRST_TSADC 92 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define SRST_HDMI 96 29*4882a593Smuzhiyun #define SRST_HDMI_APB 97 30*4882a593Smuzhiyun #define SRST_CIF1 111 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #endif 33