xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/imx7ulp-evk.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
5*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as
6*4882a593Smuzhiyun * published by the Free Software Foundation.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/dts-v1/;
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun#include "imx7ulp.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "NXP i.MX7ULP EVK";
15*4882a593Smuzhiyun	compatible = "fsl,imx7ulp-evk", "fsl,imx7ulp", "Generic DT based system";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	chosen {
18*4882a593Smuzhiyun		bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x402D0010,115200";
19*4882a593Smuzhiyun		stdout-path = &lpuart4;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	bcmdhd_wlan_0: bcmdhd_wlan@0 {
23*4882a593Smuzhiyun		compatible = "android,bcmdhd_wlan";
24*4882a593Smuzhiyun		wlreg_on-supply = <&wlreg_on>;
25*4882a593Smuzhiyun		bcmdhd_fw = "/lib/firmware/bcm/1DX_BCM4343W/fw_bcmdhd.bin";
26*4882a593Smuzhiyun		bcmdhd_nv = "/lib/firmware/bcm/1DX_BCM4343W/bcmdhd.1DX.SDIO.cal";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	memory {
30*4882a593Smuzhiyun		device_type = "memory";
31*4882a593Smuzhiyun		reg = <0x60000000 0x40000000>;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	backlight {
35*4882a593Smuzhiyun		compatible = "gpio-backlight";
36*4882a593Smuzhiyun		pinctrl-names = "default";
37*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_backlight>;
38*4882a593Smuzhiyun		gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
39*4882a593Smuzhiyun		default-on;
40*4882a593Smuzhiyun		status = "okay";
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	mipi_dsi_reset: mipi-dsi-reset {
44*4882a593Smuzhiyun		compatible = "gpio-reset";
45*4882a593Smuzhiyun		reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
46*4882a593Smuzhiyun		reset-delay-us = <1000>;
47*4882a593Smuzhiyun		#reset-cells = <0>;
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	regulators {
51*4882a593Smuzhiyun		compatible = "simple-bus";
52*4882a593Smuzhiyun		#address-cells = <1>;
53*4882a593Smuzhiyun		#size-cells = <0>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		wlreg_on: fixedregulator@100 {
56*4882a593Smuzhiyun			compatible = "regulator-fixed";
57*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
58*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
59*4882a593Smuzhiyun			regulator-name = "wlreg_on";
60*4882a593Smuzhiyun			gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
61*4882a593Smuzhiyun			startup-delay-us = <100>;
62*4882a593Smuzhiyun			enable-active-high;
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		reg_usb_otg1_vbus: regulator@0 {
66*4882a593Smuzhiyun			compatible = "regulator-fixed";
67*4882a593Smuzhiyun			reg = <0>;
68*4882a593Smuzhiyun			pinctrl-names = "default";
69*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usb_otg1>;
70*4882a593Smuzhiyun			regulator-name = "usb_otg1_vbus";
71*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
72*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
73*4882a593Smuzhiyun			gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
74*4882a593Smuzhiyun			enable-active-high;
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		reg_vsd_3v3: regulator@1 {
78*4882a593Smuzhiyun			compatible = "regulator-fixed";
79*4882a593Smuzhiyun			reg = <1>;
80*4882a593Smuzhiyun			regulator-name = "VSD_3V3";
81*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
82*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
83*4882a593Smuzhiyun			gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
84*4882a593Smuzhiyun			enable-active-high;
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		reg_vsd_3v3b: regulator@2 {
88*4882a593Smuzhiyun			compatible = "regulator-fixed";
89*4882a593Smuzhiyun			reg = <2>;
90*4882a593Smuzhiyun			regulator-name = "VSD_3V3B";
91*4882a593Smuzhiyun			regulator-min-microvolt = <3300000>;
92*4882a593Smuzhiyun			regulator-max-microvolt = <3300000>;
93*4882a593Smuzhiyun			gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
94*4882a593Smuzhiyun			enable-active-high;
95*4882a593Smuzhiyun		};
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	extcon_usb1: extcon_usb1 {
99*4882a593Smuzhiyun		compatible = "linux,extcon-usb-gpio";
100*4882a593Smuzhiyun		id-gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
101*4882a593Smuzhiyun		pinctrl-names = "default";
102*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_extcon_usb1>;
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	pf1550-rpmsg {
106*4882a593Smuzhiyun		compatible = "fsl,pf1550-rpmsg";
107*4882a593Smuzhiyun		sw1_reg: SW1 {
108*4882a593Smuzhiyun				regulator-name = "SW1";
109*4882a593Smuzhiyun				regulator-min-microvolt = <600000>;
110*4882a593Smuzhiyun				regulator-max-microvolt = <1387500>;
111*4882a593Smuzhiyun				regulator-boot-on;
112*4882a593Smuzhiyun				regulator-always-on;
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		sw2_reg: SW2 {
116*4882a593Smuzhiyun				regulator-name = "SW2";
117*4882a593Smuzhiyun				regulator-min-microvolt = <600000>;
118*4882a593Smuzhiyun				regulator-max-microvolt = <1387500>;
119*4882a593Smuzhiyun				regulator-boot-on;
120*4882a593Smuzhiyun				regulator-always-on;
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		sw3_reg: SW3 {
124*4882a593Smuzhiyun				regulator-name = "SW3";
125*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
126*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
127*4882a593Smuzhiyun				regulator-boot-on;
128*4882a593Smuzhiyun				regulator-always-on;
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		vref_reg: VREFDDR {
132*4882a593Smuzhiyun				regulator-name = "VREFDDR";
133*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
134*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
135*4882a593Smuzhiyun				regulator-boot-on;
136*4882a593Smuzhiyun				regulator-always-on;
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun		vldo1_reg: LDO1 {
140*4882a593Smuzhiyun				regulator-name = "LDO1";
141*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
142*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
143*4882a593Smuzhiyun				regulator-always-on;
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		vldo2_reg: LDO2 {
147*4882a593Smuzhiyun				regulator-name = "LDO2";
148*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
149*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
150*4882a593Smuzhiyun				regulator-always-on;
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun		vldo3_reg: LDO3 {
154*4882a593Smuzhiyun				regulator-name = "LDO3";
155*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
156*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
157*4882a593Smuzhiyun				regulator-always-on;
158*4882a593Smuzhiyun		};
159*4882a593Smuzhiyun	};
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun&iomuxc1 {
163*4882a593Smuzhiyun	pinctrl-names = "default";
164*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_hog_1>;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	imx7ulp-evk {
167*4882a593Smuzhiyun		pinctrl_hog_1: hoggrp-1 {
168*4882a593Smuzhiyun			fsl,pins = <
169*4882a593Smuzhiyun				ULP1_PAD_PTC10__PTC10		0x30100		/* USDHC0 CD */
170*4882a593Smuzhiyun				ULP1_PAD_PTC1__PTC1		0x20100
171*4882a593Smuzhiyun				ULP1_PAD_PTD0__PTD0		0x30100		/* USDHC0 RST */
172*4882a593Smuzhiyun				ULP1_PAD_PTE13__PTE13		0x30103		/* USDHC1 CD */
173*4882a593Smuzhiyun				ULP1_PAD_PTE12__PTE12		0x30103		/* USDHC1 WP */
174*4882a593Smuzhiyun				ULP1_PAD_PTE14__SDHC1_VS	0x843		/* USDHC1 VSEL */
175*4882a593Smuzhiyun			>;
176*4882a593Smuzhiyun		};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun		pinctrl_backlight: backlight_grp {
179*4882a593Smuzhiyun			fsl,pins = <
180*4882a593Smuzhiyun				ULP1_PAD_PTF2__PTF2		0x20100
181*4882a593Smuzhiyun			>;
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun		pinctrl_lpi2c5: lpi2c5grp {
185*4882a593Smuzhiyun			fsl,pins = <
186*4882a593Smuzhiyun				ULP1_PAD_PTC4__LPI2C5_SCL       0x527
187*4882a593Smuzhiyun				ULP1_PAD_PTC5__LPI2C5_SDA       0x527
188*4882a593Smuzhiyun			>;
189*4882a593Smuzhiyun		};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun		pinctrl_mipi_dsi_reset: mipi_dsi_reset_grp {
192*4882a593Smuzhiyun			fsl,pins = <
193*4882a593Smuzhiyun				ULP1_PAD_PTC19__PTC19		0x20103
194*4882a593Smuzhiyun			>;
195*4882a593Smuzhiyun		};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun		pinctrl_lpuart4: lpuart4grp {
198*4882a593Smuzhiyun			fsl,pins = <
199*4882a593Smuzhiyun				ULP1_PAD_PTC3__LPUART4_RX	0x400
200*4882a593Smuzhiyun				ULP1_PAD_PTC2__LPUART4_TX	0x400
201*4882a593Smuzhiyun			>;
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun		pinctrl_lpuart6: lpuart6grp {
205*4882a593Smuzhiyun			fsl,pins = <
206*4882a593Smuzhiyun				ULP1_PAD_PTE10__LPUART6_TX	0x400
207*4882a593Smuzhiyun				ULP1_PAD_PTE11__LPUART6_RX	0x400
208*4882a593Smuzhiyun				ULP1_PAD_PTE9__LPUART6_RTS_B	0x400
209*4882a593Smuzhiyun				ULP1_PAD_PTE8__LPUART6_CTS_B	0x400
210*4882a593Smuzhiyun				ULP1_PAD_PTE7__PTE7		0x00 /* BT_REG_ON */
211*4882a593Smuzhiyun			>;
212*4882a593Smuzhiyun		};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun		pinctrl_lpuart7: lpuart7grp {
215*4882a593Smuzhiyun			fsl,pins = <
216*4882a593Smuzhiyun				ULP1_PAD_PTF14__LPUART7_TX	0x400
217*4882a593Smuzhiyun				ULP1_PAD_PTF15__LPUART7_RX	0x400
218*4882a593Smuzhiyun				ULP1_PAD_PTF13__LPUART7_RTS_B	0x400
219*4882a593Smuzhiyun				ULP1_PAD_PTF12__LPUART7_CTS_B	0x400
220*4882a593Smuzhiyun			>;
221*4882a593Smuzhiyun		};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun		pinctrl_usdhc0: usdhc0grp {
224*4882a593Smuzhiyun			fsl,pins = <
225*4882a593Smuzhiyun				ULP1_PAD_PTD1__SDHC0_CMD	0x843
226*4882a593Smuzhiyun				ULP1_PAD_PTD2__SDHC0_CLK	0x10843
227*4882a593Smuzhiyun				ULP1_PAD_PTD7__SDHC0_D3		0x843
228*4882a593Smuzhiyun				ULP1_PAD_PTD8__SDHC0_D2		0x843
229*4882a593Smuzhiyun				ULP1_PAD_PTD9__SDHC0_D1		0x843
230*4882a593Smuzhiyun				ULP1_PAD_PTD10__SDHC0_D0	0x843
231*4882a593Smuzhiyun			>;
232*4882a593Smuzhiyun		};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun		pinctrl_usdhc0_8bit: usdhc0grp_8bit {
235*4882a593Smuzhiyun			fsl,pins = <
236*4882a593Smuzhiyun				ULP1_PAD_PTD1__SDHC0_CMD	0x843
237*4882a593Smuzhiyun				ULP1_PAD_PTD2__SDHC0_CLK	0x843
238*4882a593Smuzhiyun				ULP1_PAD_PTD3__SDHC0_D7		0x843
239*4882a593Smuzhiyun				ULP1_PAD_PTD4__SDHC0_D6		0x843
240*4882a593Smuzhiyun				ULP1_PAD_PTD5__SDHC0_D5		0x843
241*4882a593Smuzhiyun				ULP1_PAD_PTD6__SDHC0_D4		0x843
242*4882a593Smuzhiyun				ULP1_PAD_PTD7__SDHC0_D3		0x843
243*4882a593Smuzhiyun				ULP1_PAD_PTD8__SDHC0_D2		0x843
244*4882a593Smuzhiyun				ULP1_PAD_PTD9__SDHC0_D1		0x843
245*4882a593Smuzhiyun				ULP1_PAD_PTD10__SDHC0_D0	0x843
246*4882a593Smuzhiyun			>;
247*4882a593Smuzhiyun		};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun		pinctrl_lpi2c7: lpi2c7grp {
250*4882a593Smuzhiyun			fsl,pins = <
251*4882a593Smuzhiyun				ULP1_PAD_PTF12__LPI2C7_SCL	0x527
252*4882a593Smuzhiyun				ULP1_PAD_PTF13__LPI2C7_SDA	0x527
253*4882a593Smuzhiyun			>;
254*4882a593Smuzhiyun		};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun		pinctrl_lpspi3: lpspi3grp {
257*4882a593Smuzhiyun			fsl,pins = <
258*4882a593Smuzhiyun				ULP1_PAD_PTF16__LPSPI3_SIN      0x300
259*4882a593Smuzhiyun				ULP1_PAD_PTF17__LPSPI3_SOUT     0x300
260*4882a593Smuzhiyun				ULP1_PAD_PTF18__LPSPI3_SCK      0x300
261*4882a593Smuzhiyun				ULP1_PAD_PTF19__LPSPI3_PCS0     0x300
262*4882a593Smuzhiyun			>;
263*4882a593Smuzhiyun		};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun		pinctrl_usb_otg1: usbotg1grp {
266*4882a593Smuzhiyun			fsl,pins = <
267*4882a593Smuzhiyun				ULP1_PAD_PTC0__PTC0		0x30100
268*4882a593Smuzhiyun			>;
269*4882a593Smuzhiyun		};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun		pinctrl_extcon_usb1: extcon1grp {
272*4882a593Smuzhiyun			fsl,pins = <
273*4882a593Smuzhiyun				ULP1_PAD_PTC8__PTC8		0x30103
274*4882a593Smuzhiyun			>;
275*4882a593Smuzhiyun		};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun		pinctrl_usdhc1: usdhc1grp {
278*4882a593Smuzhiyun			fsl,pins = <
279*4882a593Smuzhiyun				ULP1_PAD_PTE3__SDHC1_CMD	0x843
280*4882a593Smuzhiyun				ULP1_PAD_PTE2__SDHC1_CLK	0x843
281*4882a593Smuzhiyun				ULP1_PAD_PTE1__SDHC1_D0		0x843
282*4882a593Smuzhiyun				ULP1_PAD_PTE0__SDHC1_D1		0x843
283*4882a593Smuzhiyun				ULP1_PAD_PTE5__SDHC1_D2		0x843
284*4882a593Smuzhiyun				ULP1_PAD_PTE4__SDHC1_D3		0x843
285*4882a593Smuzhiyun			>;
286*4882a593Smuzhiyun		};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun		pinctrl_usdhc1_rst: usdhc1grp_rst {
289*4882a593Smuzhiyun			fsl,pins = <
290*4882a593Smuzhiyun				ULP1_PAD_PTE11__PTE11			0x30100	/* USDHC1 RST */
291*4882a593Smuzhiyun			>;
292*4882a593Smuzhiyun		};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun		pinctrl_wifi: wifigrp {
295*4882a593Smuzhiyun			fsl,pins = <
296*4882a593Smuzhiyun				ULP1_PAD_PTE6__PTE6		0x43 /* WL_REG_ON */
297*4882a593Smuzhiyun			>;
298*4882a593Smuzhiyun		};
299*4882a593Smuzhiyun	};
300*4882a593Smuzhiyun};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun&lcdif {
303*4882a593Smuzhiyun	status = "okay";
304*4882a593Smuzhiyun	disp-dev = "mipi_dsi_northwest";
305*4882a593Smuzhiyun	display = <&display0>;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	display0: display {
308*4882a593Smuzhiyun		bits-per-pixel = <16>;
309*4882a593Smuzhiyun		bus-width = <24>;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun		display-timings {
312*4882a593Smuzhiyun			native-mode = <&timing0>;
313*4882a593Smuzhiyun			timing0: timing0 {
314*4882a593Smuzhiyun			clock-frequency = <9200000>;
315*4882a593Smuzhiyun			hactive = <480>;
316*4882a593Smuzhiyun			vactive = <272>;
317*4882a593Smuzhiyun			hfront-porch = <8>;
318*4882a593Smuzhiyun			hback-porch = <4>;
319*4882a593Smuzhiyun			hsync-len = <41>;
320*4882a593Smuzhiyun			vback-porch = <2>;
321*4882a593Smuzhiyun			vfront-porch = <4>;
322*4882a593Smuzhiyun			vsync-len = <10>;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun			hsync-active = <0>;
325*4882a593Smuzhiyun			vsync-active = <0>;
326*4882a593Smuzhiyun			de-active = <1>;
327*4882a593Smuzhiyun			pixelclk-active = <0>;
328*4882a593Smuzhiyun			};
329*4882a593Smuzhiyun		};
330*4882a593Smuzhiyun	};
331*4882a593Smuzhiyun};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun&lpi2c7 {
334*4882a593Smuzhiyun	#address-cells = <1>;
335*4882a593Smuzhiyun	#size-cells = <0>;
336*4882a593Smuzhiyun	pinctrl-names = "default";
337*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lpi2c7>;
338*4882a593Smuzhiyun};
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun&lpi2c5 {
341*4882a593Smuzhiyun	#address-cells = <1>;
342*4882a593Smuzhiyun	#size-cells = <0>;
343*4882a593Smuzhiyun	pinctrl-names = "default";
344*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lpi2c5>;
345*4882a593Smuzhiyun	status = "okay";
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun	fxas2100x@20 {
348*4882a593Smuzhiyun		compatible = "fsl,fxas2100x";
349*4882a593Smuzhiyun		reg = <0x20>;
350*4882a593Smuzhiyun	};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun	fxos8700@1e {
353*4882a593Smuzhiyun		compatible = "fsl,fxos8700";
354*4882a593Smuzhiyun		reg = <0x1e>;
355*4882a593Smuzhiyun	};
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun	mpl3115@60 {
358*4882a593Smuzhiyun		compatible = "fsl,mpl3115";
359*4882a593Smuzhiyun		reg = <0x60>;
360*4882a593Smuzhiyun	};
361*4882a593Smuzhiyun};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun&lpspi3 {
364*4882a593Smuzhiyun	#address-cells = <1>;
365*4882a593Smuzhiyun	#size-cells = <0>;
366*4882a593Smuzhiyun	pinctrl-names = "default";
367*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lpspi3>;
368*4882a593Smuzhiyun	status = "okay";
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun	spidev0: spi@0 {
371*4882a593Smuzhiyun		reg = <0>;
372*4882a593Smuzhiyun		compatible = "rohm,dh2228fv";
373*4882a593Smuzhiyun		spi-max-frequency = <1000000>;
374*4882a593Smuzhiyun	};
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&mipi_dsi {
378*4882a593Smuzhiyun	pinctrl-names = "default";
379*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_mipi_dsi_reset>;
380*4882a593Smuzhiyun	lcd_panel = "TRULY-WVGA-TFT3P5581E";
381*4882a593Smuzhiyun	resets = <&mipi_dsi_reset>;
382*4882a593Smuzhiyun	status = "okay";
383*4882a593Smuzhiyun};
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun&lpuart4 { /* console */
386*4882a593Smuzhiyun	pinctrl-names = "default";
387*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lpuart4>;
388*4882a593Smuzhiyun	status = "okay";
389*4882a593Smuzhiyun};
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun&lpuart6 { /* BT */
392*4882a593Smuzhiyun	pinctrl-names = "default";
393*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lpuart6>;
394*4882a593Smuzhiyun	status = "okay";
395*4882a593Smuzhiyun};
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun&lpuart7 { /* Uart test */
398*4882a593Smuzhiyun	pinctrl-names = "default";
399*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_lpuart7>;
400*4882a593Smuzhiyun	status = "disabled";
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&rpmsg{
404*4882a593Smuzhiyun	status = "okay";
405*4882a593Smuzhiyun};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun&usbotg1 {
408*4882a593Smuzhiyun	vbus-supply = <&reg_usb_otg1_vbus>;
409*4882a593Smuzhiyun	extcon = <0>, <&extcon_usb1>;
410*4882a593Smuzhiyun	srp-disable;
411*4882a593Smuzhiyun	hnp-disable;
412*4882a593Smuzhiyun	adp-disable;
413*4882a593Smuzhiyun	status = "okay";
414*4882a593Smuzhiyun};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun&usdhc0 {
417*4882a593Smuzhiyun	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
418*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usdhc0>;
419*4882a593Smuzhiyun	pinctrl-1 = <&pinctrl_usdhc0>;
420*4882a593Smuzhiyun	pinctrl-2 = <&pinctrl_usdhc0>;
421*4882a593Smuzhiyun	pinctrl-3 = <&pinctrl_usdhc0>;
422*4882a593Smuzhiyun	cd-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
423*4882a593Smuzhiyun	vmmc-supply = <&reg_vsd_3v3>;
424*4882a593Smuzhiyun	vqmmc-supply = <&vldo2_reg>;
425*4882a593Smuzhiyun	status = "okay";
426*4882a593Smuzhiyun};
427