1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Include file for Freescale Layerscape-1046A family SoC. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2016, Freescale Semiconductor 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Mingkai Hu <Mingkai.hu@nxp.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 9*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 10*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/include/ "fsl-ls1046a.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "LS1046A QDS Board"; 17*4882a593Smuzhiyun aliases { 18*4882a593Smuzhiyun spi0 = &qspi; 19*4882a593Smuzhiyun spi1 = &dspi0; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&dspi0 { 24*4882a593Smuzhiyun bus-num = <0>; 25*4882a593Smuzhiyun status = "okay"; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun dflash0: n25q128a { 28*4882a593Smuzhiyun #address-cells = <1>; 29*4882a593Smuzhiyun #size-cells = <1>; 30*4882a593Smuzhiyun compatible = "spi-flash"; 31*4882a593Smuzhiyun spi-max-frequency = <1000000>; /* input clock */ 32*4882a593Smuzhiyun spi-cpol; 33*4882a593Smuzhiyun spi-cpha; 34*4882a593Smuzhiyun reg = <0>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun dflash1: sst25wf040b { 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <1>; 40*4882a593Smuzhiyun compatible = "spi-flash"; 41*4882a593Smuzhiyun spi-max-frequency = <3500000>; 42*4882a593Smuzhiyun spi-cpol; 43*4882a593Smuzhiyun spi-cpha; 44*4882a593Smuzhiyun reg = <1>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun dflash2: en25s64 { 48*4882a593Smuzhiyun #address-cells = <1>; 49*4882a593Smuzhiyun #size-cells = <1>; 50*4882a593Smuzhiyun compatible = "spi-flash"; 51*4882a593Smuzhiyun spi-max-frequency = <3500000>; 52*4882a593Smuzhiyun spi-cpol; 53*4882a593Smuzhiyun spi-cpha; 54*4882a593Smuzhiyun reg = <2>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun&qspi { 59*4882a593Smuzhiyun bus-num = <0>; 60*4882a593Smuzhiyun status = "okay"; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun qflash0: s25fl128s@0 { 63*4882a593Smuzhiyun #address-cells = <1>; 64*4882a593Smuzhiyun #size-cells = <1>; 65*4882a593Smuzhiyun compatible = "spi-flash"; 66*4882a593Smuzhiyun spi-max-frequency = <20000000>; 67*4882a593Smuzhiyun reg = <0>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun}; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun&duart0 { 72*4882a593Smuzhiyun status = "okay"; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&duart1 { 76*4882a593Smuzhiyun status = "okay"; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&lpuart0 { 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun}; 82