xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/fsl-ls1043a-rdb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Include file for Freescale Layerscape-1043A family SoC.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2015, Freescale Semiconductor
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Mingkai Hu <Mingkai.hu@freescale.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun * License version 2.  This program is licensed "as is" without any
10*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/dts-v1/;
14*4882a593Smuzhiyun/include/ "fsl-ls1043a.dtsi"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "LS1043A RDB Board";
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun        aliases {
20*4882a593Smuzhiyun		spi1 = &dspi0;
21*4882a593Smuzhiyun        };
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun&dspi0 {
26*4882a593Smuzhiyun	bus-num = <0>;
27*4882a593Smuzhiyun	status = "okay";
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	dspiflash: n25q12a {
30*4882a593Smuzhiyun		#address-cells = <1>;
31*4882a593Smuzhiyun		#size-cells = <1>;
32*4882a593Smuzhiyun		compatible = "spi-flash";
33*4882a593Smuzhiyun		reg = <0>;
34*4882a593Smuzhiyun		spi-max-frequency = <1000000>; /* input clock */
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun&i2c0 {
40*4882a593Smuzhiyun	status = "okay";
41*4882a593Smuzhiyun	ina220@40 {
42*4882a593Smuzhiyun		compatible = "ti,ina220";
43*4882a593Smuzhiyun		reg = <0x40>;
44*4882a593Smuzhiyun		shunt-resistor = <1000>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun	adt7461a@4c {
47*4882a593Smuzhiyun		compatible = "adi,adt7461a";
48*4882a593Smuzhiyun		reg = <0x4c>;
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun	eeprom@52 {
51*4882a593Smuzhiyun		compatible = "at24,24c512";
52*4882a593Smuzhiyun		reg = <0x52>;
53*4882a593Smuzhiyun	};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	eeprom@53 {
56*4882a593Smuzhiyun		compatible = "at24,24c512";
57*4882a593Smuzhiyun		reg = <0x53>;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	rtc@68 {
61*4882a593Smuzhiyun		compatible = "pericom,pt7c4338";
62*4882a593Smuzhiyun		reg = <0x68>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun&ifc {
67*4882a593Smuzhiyun	status = "okay";
68*4882a593Smuzhiyun	#address-cells = <2>;
69*4882a593Smuzhiyun	#size-cells = <1>;
70*4882a593Smuzhiyun	/* NOR, NAND Flashes and FPGA on board */
71*4882a593Smuzhiyun	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
72*4882a593Smuzhiyun		  0x1 0x0 0x0 0x7e800000 0x00010000
73*4882a593Smuzhiyun		  0x2 0x0 0x0 0x7fb00000 0x00000100>;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		nor@0,0 {
76*4882a593Smuzhiyun			compatible = "cfi-flash";
77*4882a593Smuzhiyun			#address-cells = <1>;
78*4882a593Smuzhiyun			#size-cells = <1>;
79*4882a593Smuzhiyun			reg = <0x0 0x0 0x8000000>;
80*4882a593Smuzhiyun			bank-width = <2>;
81*4882a593Smuzhiyun			device-width = <1>;
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		nand@1,0 {
85*4882a593Smuzhiyun			compatible = "fsl,ifc-nand";
86*4882a593Smuzhiyun			#address-cells = <1>;
87*4882a593Smuzhiyun			#size-cells = <1>;
88*4882a593Smuzhiyun			reg = <0x1 0x0 0x10000>;
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		cpld: board-control@2,0 {
92*4882a593Smuzhiyun			compatible = "fsl,ls1043ardb-cpld";
93*4882a593Smuzhiyun			reg = <0x2 0x0 0x0000100>;
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun&duart0 {
98*4882a593Smuzhiyun	status = "okay";
99*4882a593Smuzhiyun};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun&duart1 {
102*4882a593Smuzhiyun	status = "okay";
103*4882a593Smuzhiyun};
104