1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * U-Boot additions to enable a generic Exynos GPIO driver 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2014 Google, Inc 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/{ 10*4882a593Smuzhiyun pinctrl_0: pinctrl@11400000 { 11*4882a593Smuzhiyun #address-cells = <1>; 12*4882a593Smuzhiyun #size-cells = <1>; 13*4882a593Smuzhiyun gpf0: gpf0 { 14*4882a593Smuzhiyun reg = <0x180 0x20>; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun gpj0: gpj0 { 17*4882a593Smuzhiyun reg = <0x240 0x20>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun pinctrl_1: pinctrl@11000000 { 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells = <1>; 24*4882a593Smuzhiyun gpk0: gpk0 { 25*4882a593Smuzhiyun reg = <0x40 0x20>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun gpm0: gpm0 { 28*4882a593Smuzhiyun reg = <0x260 0x20>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun gpx0: gpx0 { 31*4882a593Smuzhiyun reg = <0xc00 0x20>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun pinctrl_2: pinctrl@03860000 { 36*4882a593Smuzhiyun #address-cells = <1>; 37*4882a593Smuzhiyun #size-cells = <1>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun pinctrl_3: pinctrl@106E0000 { 41*4882a593Smuzhiyun #address-cells = <1>; 42*4882a593Smuzhiyun #size-cells = <1>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun}; 46