1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Samsung's Exynos4210 SoC device tree source 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 5*4882a593Smuzhiyun * http://www.samsung.com 6*4882a593Smuzhiyun * Copyright (c) 2010-2011 Linaro Ltd. 7*4882a593Smuzhiyun * www.linaro.org 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210 10*4882a593Smuzhiyun * based board files can include this file and provide values for board specfic 11*4882a593Smuzhiyun * bindings. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * Note: This file does not include device nodes for all the controllers in 14*4882a593Smuzhiyun * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional 15*4882a593Smuzhiyun * nodes can be added to this file. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 18*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 19*4882a593Smuzhiyun * published by the Free Software Foundation. 20*4882a593Smuzhiyun*/ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun#include "exynos4.dtsi" 23*4882a593Smuzhiyun#include "exynos4210-pinctrl.dtsi" 24*4882a593Smuzhiyun#include "exynos4210-pinctrl-uboot.dtsi" 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun/ { 27*4882a593Smuzhiyun compatible = "samsung,exynos4210"; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun aliases { 30*4882a593Smuzhiyun pinctrl0 = &pinctrl_0; 31*4882a593Smuzhiyun pinctrl1 = &pinctrl_1; 32*4882a593Smuzhiyun pinctrl2 = &pinctrl_2; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun pd_lcd1: lcd1-power-domain@10023CA0 { 36*4882a593Smuzhiyun compatible = "samsung,exynos4210-pd"; 37*4882a593Smuzhiyun reg = <0x10023CA0 0x20>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun gic: interrupt-controller@10490000 { 41*4882a593Smuzhiyun cpu-offset = <0x8000>; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun combiner: interrupt-controller@10440000 { 45*4882a593Smuzhiyun samsung,combiner-nr = <16>; 46*4882a593Smuzhiyun interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 47*4882a593Smuzhiyun <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 48*4882a593Smuzhiyun <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, 49*4882a593Smuzhiyun <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun mct@10050000 { 53*4882a593Smuzhiyun compatible = "samsung,exynos4210-mct"; 54*4882a593Smuzhiyun reg = <0x10050000 0x800>; 55*4882a593Smuzhiyun interrupt-parent = <&mct_map>; 56*4882a593Smuzhiyun interrupts = <0>, <1>, <2>, <3>, <4>, <5>; 57*4882a593Smuzhiyun clocks = <&clock 3>, <&clock 344>; 58*4882a593Smuzhiyun clock-names = "fin_pll", "mct"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun mct_map: mct-map { 61*4882a593Smuzhiyun #interrupt-cells = <1>; 62*4882a593Smuzhiyun #address-cells = <0>; 63*4882a593Smuzhiyun #size-cells = <0>; 64*4882a593Smuzhiyun interrupt-map = <0 &gic 0 57 0>, 65*4882a593Smuzhiyun <1 &gic 0 69 0>, 66*4882a593Smuzhiyun <2 &combiner 12 6>, 67*4882a593Smuzhiyun <3 &combiner 12 7>, 68*4882a593Smuzhiyun <4 &gic 0 42 0>, 69*4882a593Smuzhiyun <5 &gic 0 48 0>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun clock: clock-controller@10030000 { 74*4882a593Smuzhiyun compatible = "samsung,exynos4210-clock"; 75*4882a593Smuzhiyun reg = <0x10030000 0x20000>; 76*4882a593Smuzhiyun #clock-cells = <1>; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun pmu { 80*4882a593Smuzhiyun compatible = "arm,cortex-a9-pmu"; 81*4882a593Smuzhiyun interrupt-parent = <&combiner>; 82*4882a593Smuzhiyun interrupts = <2 2>, <3 2>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun pinctrl_0: pinctrl@11400000 { 86*4882a593Smuzhiyun compatible = "samsung,exynos4210-pinctrl"; 87*4882a593Smuzhiyun reg = <0x11400000 0x1000>; 88*4882a593Smuzhiyun interrupts = <0 47 0>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun pinctrl_1: pinctrl@11000000 { 92*4882a593Smuzhiyun compatible = "samsung,exynos4210-pinctrl"; 93*4882a593Smuzhiyun reg = <0x11000000 0x1000>; 94*4882a593Smuzhiyun interrupts = <0 46 0>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun wakup_eint: wakeup-interrupt-controller { 97*4882a593Smuzhiyun compatible = "samsung,exynos4210-wakeup-eint"; 98*4882a593Smuzhiyun interrupt-parent = <&gic>; 99*4882a593Smuzhiyun interrupts = <0 32 0>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun pinctrl_2: pinctrl@03860000 { 104*4882a593Smuzhiyun compatible = "samsung,exynos4210-pinctrl"; 105*4882a593Smuzhiyun reg = <0x03860000 0x1000>; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun tmu@100C0000 { 109*4882a593Smuzhiyun compatible = "samsung,exynos4210-tmu"; 110*4882a593Smuzhiyun interrupt-parent = <&combiner>; 111*4882a593Smuzhiyun reg = <0x100C0000 0x100>; 112*4882a593Smuzhiyun interrupts = <2 4>; 113*4882a593Smuzhiyun clocks = <&clock 383>; 114*4882a593Smuzhiyun clock-names = "tmu_apbif"; 115*4882a593Smuzhiyun status = "disabled"; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun g2d@12800000 { 119*4882a593Smuzhiyun compatible = "samsung,s5pv210-g2d"; 120*4882a593Smuzhiyun reg = <0x12800000 0x1000>; 121*4882a593Smuzhiyun interrupts = <0 89 0>; 122*4882a593Smuzhiyun clocks = <&clock 177>, <&clock 277>; 123*4882a593Smuzhiyun clock-names = "sclk_fimg2d", "fimg2d"; 124*4882a593Smuzhiyun status = "disabled"; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun camera { 128*4882a593Smuzhiyun clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; 129*4882a593Smuzhiyun clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun fimc_0: fimc@11800000 { 132*4882a593Smuzhiyun samsung,pix-limits = <4224 8192 1920 4224>; 133*4882a593Smuzhiyun samsung,mainscaler-ext; 134*4882a593Smuzhiyun samsung,cam-if; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun fimc_1: fimc@11810000 { 138*4882a593Smuzhiyun samsung,pix-limits = <4224 8192 1920 4224>; 139*4882a593Smuzhiyun samsung,mainscaler-ext; 140*4882a593Smuzhiyun samsung,cam-if; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun fimc_2: fimc@11820000 { 144*4882a593Smuzhiyun samsung,pix-limits = <4224 8192 1920 4224>; 145*4882a593Smuzhiyun samsung,mainscaler-ext; 146*4882a593Smuzhiyun samsung,lcd-wb; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun fimc_3: fimc@11830000 { 150*4882a593Smuzhiyun samsung,pix-limits = <1920 8192 1366 1920>; 151*4882a593Smuzhiyun samsung,rotators = <0>; 152*4882a593Smuzhiyun samsung,mainscaler-ext; 153*4882a593Smuzhiyun samsung,lcd-wb; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun}; 157