1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. 5*4882a593Smuzhiyun * http://www.samsung.com 6*4882a593Smuzhiyun * Copyright (c) 2011-2012 Linaro Ltd. 7*4882a593Smuzhiyun * www.linaro.org 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device 10*4882a593Smuzhiyun * tree nodes are listed in this file. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 13*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 14*4882a593Smuzhiyun * published by the Free Software Foundation. 15*4882a593Smuzhiyun*/ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun pinctrl@11400000 { 19*4882a593Smuzhiyun gpa0: gpa0 { 20*4882a593Smuzhiyun gpio-controller; 21*4882a593Smuzhiyun #gpio-cells = <2>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun interrupt-controller; 24*4882a593Smuzhiyun #interrupt-cells = <2>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun gpa1: gpa1 { 28*4882a593Smuzhiyun gpio-controller; 29*4882a593Smuzhiyun #gpio-cells = <2>; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupt-controller; 32*4882a593Smuzhiyun #interrupt-cells = <2>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun gpb: gpb { 36*4882a593Smuzhiyun gpio-controller; 37*4882a593Smuzhiyun #gpio-cells = <2>; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun interrupt-controller; 40*4882a593Smuzhiyun #interrupt-cells = <2>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun gpc0: gpc0 { 44*4882a593Smuzhiyun gpio-controller; 45*4882a593Smuzhiyun #gpio-cells = <2>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun interrupt-controller; 48*4882a593Smuzhiyun #interrupt-cells = <2>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun gpc1: gpc1 { 52*4882a593Smuzhiyun gpio-controller; 53*4882a593Smuzhiyun #gpio-cells = <2>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun interrupt-controller; 56*4882a593Smuzhiyun #interrupt-cells = <2>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun gpd0: gpd0 { 60*4882a593Smuzhiyun gpio-controller; 61*4882a593Smuzhiyun #gpio-cells = <2>; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun interrupt-controller; 64*4882a593Smuzhiyun #interrupt-cells = <2>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun gpd1: gpd1 { 68*4882a593Smuzhiyun gpio-controller; 69*4882a593Smuzhiyun #gpio-cells = <2>; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun interrupt-controller; 72*4882a593Smuzhiyun #interrupt-cells = <2>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun gpe0: gpe0 { 76*4882a593Smuzhiyun gpio-controller; 77*4882a593Smuzhiyun #gpio-cells = <2>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun interrupt-controller; 80*4882a593Smuzhiyun #interrupt-cells = <2>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun gpe1: gpe1 { 84*4882a593Smuzhiyun gpio-controller; 85*4882a593Smuzhiyun #gpio-cells = <2>; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun interrupt-controller; 88*4882a593Smuzhiyun #interrupt-cells = <2>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun gpe2: gpe2 { 92*4882a593Smuzhiyun gpio-controller; 93*4882a593Smuzhiyun #gpio-cells = <2>; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun interrupt-controller; 96*4882a593Smuzhiyun #interrupt-cells = <2>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun gpe3: gpe3 { 100*4882a593Smuzhiyun gpio-controller; 101*4882a593Smuzhiyun #gpio-cells = <2>; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun interrupt-controller; 104*4882a593Smuzhiyun #interrupt-cells = <2>; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun gpe4: gpe4 { 108*4882a593Smuzhiyun gpio-controller; 109*4882a593Smuzhiyun #gpio-cells = <2>; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun interrupt-controller; 112*4882a593Smuzhiyun #interrupt-cells = <2>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun gpf0: gpf0 { 116*4882a593Smuzhiyun gpio-controller; 117*4882a593Smuzhiyun #gpio-cells = <2>; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun interrupt-controller; 120*4882a593Smuzhiyun #interrupt-cells = <2>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun gpf1: gpf1 { 124*4882a593Smuzhiyun gpio-controller; 125*4882a593Smuzhiyun #gpio-cells = <2>; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun interrupt-controller; 128*4882a593Smuzhiyun #interrupt-cells = <2>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun gpf2: gpf2 { 132*4882a593Smuzhiyun gpio-controller; 133*4882a593Smuzhiyun #gpio-cells = <2>; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun interrupt-controller; 136*4882a593Smuzhiyun #interrupt-cells = <2>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun gpf3: gpf3 { 140*4882a593Smuzhiyun gpio-controller; 141*4882a593Smuzhiyun #gpio-cells = <2>; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun interrupt-controller; 144*4882a593Smuzhiyun #interrupt-cells = <2>; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun pinctrl@11000000 { 150*4882a593Smuzhiyun gpj0: gpj0 { 151*4882a593Smuzhiyun gpio-controller; 152*4882a593Smuzhiyun #gpio-cells = <2>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun interrupt-controller; 155*4882a593Smuzhiyun #interrupt-cells = <2>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun gpj1: gpj1 { 159*4882a593Smuzhiyun gpio-controller; 160*4882a593Smuzhiyun #gpio-cells = <2>; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun interrupt-controller; 163*4882a593Smuzhiyun #interrupt-cells = <2>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun gpk0: gpk0 { 167*4882a593Smuzhiyun gpio-controller; 168*4882a593Smuzhiyun #gpio-cells = <2>; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun interrupt-controller; 171*4882a593Smuzhiyun #interrupt-cells = <2>; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun gpk1: gpk1 { 175*4882a593Smuzhiyun gpio-controller; 176*4882a593Smuzhiyun #gpio-cells = <2>; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun interrupt-controller; 179*4882a593Smuzhiyun #interrupt-cells = <2>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun gpk2: gpk2 { 183*4882a593Smuzhiyun gpio-controller; 184*4882a593Smuzhiyun #gpio-cells = <2>; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun interrupt-controller; 187*4882a593Smuzhiyun #interrupt-cells = <2>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun gpk3: gpk3 { 191*4882a593Smuzhiyun gpio-controller; 192*4882a593Smuzhiyun #gpio-cells = <2>; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun interrupt-controller; 195*4882a593Smuzhiyun #interrupt-cells = <2>; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun gpl0: gpl0 { 199*4882a593Smuzhiyun gpio-controller; 200*4882a593Smuzhiyun #gpio-cells = <2>; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun interrupt-controller; 203*4882a593Smuzhiyun #interrupt-cells = <2>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun gpl1: gpl1 { 207*4882a593Smuzhiyun gpio-controller; 208*4882a593Smuzhiyun #gpio-cells = <2>; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun interrupt-controller; 211*4882a593Smuzhiyun #interrupt-cells = <2>; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun gpl2: gpl2 { 215*4882a593Smuzhiyun gpio-controller; 216*4882a593Smuzhiyun #gpio-cells = <2>; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun interrupt-controller; 219*4882a593Smuzhiyun #interrupt-cells = <2>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun gpy0: gpy0 { 223*4882a593Smuzhiyun gpio-controller; 224*4882a593Smuzhiyun #gpio-cells = <2>; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun gpy1: gpy1 { 228*4882a593Smuzhiyun gpio-controller; 229*4882a593Smuzhiyun #gpio-cells = <2>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun gpy2: gpy2 { 233*4882a593Smuzhiyun gpio-controller; 234*4882a593Smuzhiyun #gpio-cells = <2>; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun gpy3: gpy3 { 238*4882a593Smuzhiyun gpio-controller; 239*4882a593Smuzhiyun #gpio-cells = <2>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun gpy4: gpy4 { 243*4882a593Smuzhiyun gpio-controller; 244*4882a593Smuzhiyun #gpio-cells = <2>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun gpy5: gpy5 { 248*4882a593Smuzhiyun gpio-controller; 249*4882a593Smuzhiyun #gpio-cells = <2>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun gpy6: gpy6 { 253*4882a593Smuzhiyun gpio-controller; 254*4882a593Smuzhiyun #gpio-cells = <2>; 255*4882a593Smuzhiyun }; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun gpx0: gpx0 { 258*4882a593Smuzhiyun gpio-controller; 259*4882a593Smuzhiyun #gpio-cells = <2>; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun interrupt-controller; 262*4882a593Smuzhiyun interrupt-parent = <&gic>; 263*4882a593Smuzhiyun interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 264*4882a593Smuzhiyun <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; 265*4882a593Smuzhiyun #interrupt-cells = <2>; 266*4882a593Smuzhiyun }; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun gpx1: gpx1 { 269*4882a593Smuzhiyun gpio-controller; 270*4882a593Smuzhiyun #gpio-cells = <2>; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun interrupt-controller; 273*4882a593Smuzhiyun interrupt-parent = <&gic>; 274*4882a593Smuzhiyun interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 275*4882a593Smuzhiyun <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 276*4882a593Smuzhiyun #interrupt-cells = <2>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun gpx2: gpx2 { 280*4882a593Smuzhiyun gpio-controller; 281*4882a593Smuzhiyun #gpio-cells = <2>; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun interrupt-controller; 284*4882a593Smuzhiyun #interrupt-cells = <2>; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun gpx3: gpx3 { 288*4882a593Smuzhiyun gpio-controller; 289*4882a593Smuzhiyun #gpio-cells = <2>; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun interrupt-controller; 292*4882a593Smuzhiyun #interrupt-cells = <2>; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun pinctrl@03860000 { 298*4882a593Smuzhiyun gpz: gpz { 299*4882a593Smuzhiyun gpio-controller; 300*4882a593Smuzhiyun #gpio-cells = <2>; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun}; 305