1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 5*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 6*4882a593Smuzhiyun * published by the Free Software Foundation. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "dra72-evm-common.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/net/ti-dp83867.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"; 14*4882a593Smuzhiyun model = "TI DRA718 EVM"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory { 17*4882a593Smuzhiyun device_type = "memory"; 18*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun vpo_sd_1v8_3v3: gpio-regulator-TPS74801 { 22*4882a593Smuzhiyun compatible = "regulator-gpio"; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun regulator-name = "vddshv8"; 25*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 26*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 27*4882a593Smuzhiyun regulator-boot-on; 28*4882a593Smuzhiyun vin-supply = <&evm_5v0>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; 31*4882a593Smuzhiyun states = <1800000 0x0 32*4882a593Smuzhiyun 3000000 0x1>; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun poweroff: gpio-poweroff { 36*4882a593Smuzhiyun compatible = "gpio-poweroff"; 37*4882a593Smuzhiyun gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>; 38*4882a593Smuzhiyun input; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&i2c1 { 43*4882a593Smuzhiyun status = "okay"; 44*4882a593Smuzhiyun clock-frequency = <400000>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun lp8733: lp8733@60 { 47*4882a593Smuzhiyun compatible = "ti,lp8733"; 48*4882a593Smuzhiyun reg = <0x60>; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun buck0-in-supply =<&vsys_3v3>; 51*4882a593Smuzhiyun buck1-in-supply =<&vsys_3v3>; 52*4882a593Smuzhiyun ldo0-in-supply =<&evm_5v0>; 53*4882a593Smuzhiyun ldo1-in-supply =<&evm_5v0>; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun lp8733_regulators: regulators { 56*4882a593Smuzhiyun lp8733_buck0_reg: buck0 { 57*4882a593Smuzhiyun /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */ 58*4882a593Smuzhiyun regulator-name = "lp8733-buck0"; 59*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 60*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 61*4882a593Smuzhiyun regulator-always-on; 62*4882a593Smuzhiyun regulator-boot-on; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun lp8733_buck1_reg: buck1 { 66*4882a593Smuzhiyun /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */ 67*4882a593Smuzhiyun regulator-name = "lp8733-buck1"; 68*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 69*4882a593Smuzhiyun regulator-max-microvolt = <1250000>; 70*4882a593Smuzhiyun regulator-boot-on; 71*4882a593Smuzhiyun regulator-always-on; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun lp8733_ldo0_reg: ldo0 { 75*4882a593Smuzhiyun /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */ 76*4882a593Smuzhiyun regulator-name = "lp8733-ldo0"; 77*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 78*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun lp8733_ldo1_reg: ldo1 { 82*4882a593Smuzhiyun /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */ 83*4882a593Smuzhiyun regulator-name = "lp8733-ldo1"; 84*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 85*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 86*4882a593Smuzhiyun regulator-always-on; 87*4882a593Smuzhiyun regulator-boot-on; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun lp8732: lp8732@61 { 93*4882a593Smuzhiyun compatible = "ti,lp8732"; 94*4882a593Smuzhiyun reg = <0x61>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun buck0-in-supply =<&vsys_3v3>; 97*4882a593Smuzhiyun buck1-in-supply =<&vsys_3v3>; 98*4882a593Smuzhiyun ldo0-in-supply =<&vsys_3v3>; 99*4882a593Smuzhiyun ldo1-in-supply =<&vsys_3v3>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun lp8732_regulators: regulators { 102*4882a593Smuzhiyun lp8732_buck0_reg: buck0 { 103*4882a593Smuzhiyun /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */ 104*4882a593Smuzhiyun regulator-name = "lp8732-buck0"; 105*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 106*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 107*4882a593Smuzhiyun regulator-always-on; 108*4882a593Smuzhiyun regulator-boot-on; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun lp8732_buck1_reg: buck1 { 112*4882a593Smuzhiyun /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */ 113*4882a593Smuzhiyun regulator-name = "lp8732-buck1"; 114*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 115*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 116*4882a593Smuzhiyun regulator-boot-on; 117*4882a593Smuzhiyun regulator-always-on; 118*4882a593Smuzhiyun }; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun lp8732_ldo0_reg: ldo0 { 121*4882a593Smuzhiyun /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */ 122*4882a593Smuzhiyun regulator-name = "lp8732-ldo0"; 123*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 124*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 125*4882a593Smuzhiyun regulator-boot-on; 126*4882a593Smuzhiyun regulator-always-on; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun lp8732_ldo1_reg: ldo1 { 130*4882a593Smuzhiyun /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */ 131*4882a593Smuzhiyun regulator-name = "lp8732-ldo1"; 132*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 133*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 134*4882a593Smuzhiyun regulator-always-on; 135*4882a593Smuzhiyun regulator-boot-on; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun}; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun&pcf_gpio_21 { 142*4882a593Smuzhiyun interrupt-parent = <&gpio7>; 143*4882a593Smuzhiyun interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 144*4882a593Smuzhiyun}; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun&pcf_hdmi { 147*4882a593Smuzhiyun p0 { 148*4882a593Smuzhiyun /* 149*4882a593Smuzhiyun * PM_OEn to High: Disable routing I2C3 to PM_I2C 150*4882a593Smuzhiyun * With this PM_SEL(p3) should not matter 151*4882a593Smuzhiyun */ 152*4882a593Smuzhiyun gpio-hog; 153*4882a593Smuzhiyun gpios = <0 GPIO_ACTIVE_LOW>; 154*4882a593Smuzhiyun output-high; 155*4882a593Smuzhiyun line-name = "pm_oe_n"; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun}; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun&mmc1 { 160*4882a593Smuzhiyun vmmc_aux-supply = <&vpo_sd_1v8_3v3>; 161*4882a593Smuzhiyun}; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun&mac { 164*4882a593Smuzhiyun mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, 165*4882a593Smuzhiyun <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ 166*4882a593Smuzhiyun <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ 167*4882a593Smuzhiyun dual_emac; 168*4882a593Smuzhiyun}; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun&cpsw_emac0 { 171*4882a593Smuzhiyun phy-handle = <&dp83867_0>; 172*4882a593Smuzhiyun phy-mode = "rgmii-id"; 173*4882a593Smuzhiyun dual_emac_res_vlan = <1>; 174*4882a593Smuzhiyun}; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun&cpsw_emac1 { 177*4882a593Smuzhiyun phy-handle = <&dp83867_1>; 178*4882a593Smuzhiyun phy-mode = "rgmii-id"; 179*4882a593Smuzhiyun dual_emac_res_vlan = <2>; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&davinci_mdio { 183*4882a593Smuzhiyun dp83867_0: ethernet-phy@2 { 184*4882a593Smuzhiyun reg = <2>; 185*4882a593Smuzhiyun ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 186*4882a593Smuzhiyun ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 187*4882a593Smuzhiyun ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 188*4882a593Smuzhiyun ti,impedance-control = <0x1f>; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun dp83867_1: ethernet-phy@3 { 192*4882a593Smuzhiyun reg = <3>; 193*4882a593Smuzhiyun ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 194*4882a593Smuzhiyun ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 195*4882a593Smuzhiyun ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 196*4882a593Smuzhiyun ti,impedance-control = <0x1f>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun}; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun/* No Sata on this device */ 201*4882a593Smuzhiyun&sata_phy { 202*4882a593Smuzhiyun status = "disabled"; 203*4882a593Smuzhiyun}; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun&sata { 206*4882a593Smuzhiyun status = "disabled"; 207*4882a593Smuzhiyun}; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun/* No RTC on this device */ 210*4882a593Smuzhiyun&rtc { 211*4882a593Smuzhiyun status = "disabled"; 212*4882a593Smuzhiyun}; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun&usb2_phy1 { 215*4882a593Smuzhiyun phy-supply = <&lp8733_ldo1_reg>; 216*4882a593Smuzhiyun}; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun&usb2_phy2 { 219*4882a593Smuzhiyun phy-supply = <&lp8733_ldo1_reg>; 220*4882a593Smuzhiyun}; 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun&dss { 223*4882a593Smuzhiyun /* Supplied by VDA_1V8_PLL */ 224*4882a593Smuzhiyun vdda_video-supply = <&lp8732_ldo0_reg>; 225*4882a593Smuzhiyun}; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun&hdmi { 228*4882a593Smuzhiyun /* Supplied by VDA_1V8_PHY */ 229*4882a593Smuzhiyun vdda_video-supply = <&lp8732_ldo1_reg>; 230*4882a593Smuzhiyun}; 231