1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2012 Atmel, 5*4882a593Smuzhiyun * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Licensed under GPLv2 or later. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun memory { 12*4882a593Smuzhiyun reg = <0x20000000 0x8000000>; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun clocks { 16*4882a593Smuzhiyun slow_xtal { 17*4882a593Smuzhiyun clock-frequency = <32768>; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun main_xtal { 21*4882a593Smuzhiyun clock-frequency = <12000000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun ahb { 26*4882a593Smuzhiyun apb { 27*4882a593Smuzhiyun pinctrl@fffff400 { 28*4882a593Smuzhiyun 1wire_cm { 29*4882a593Smuzhiyun pinctrl_1wire_cm: 1wire_cm-0 { 30*4882a593Smuzhiyun atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */ 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun rtc@fffffeb0 { 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun nand0: nand@40000000 { 41*4882a593Smuzhiyun nand-bus-width = <8>; 42*4882a593Smuzhiyun nand-ecc-mode = "hw"; 43*4882a593Smuzhiyun atmel,has-pmecc; /* Enable PMECC */ 44*4882a593Smuzhiyun atmel,pmecc-cap = <2>; 45*4882a593Smuzhiyun atmel,pmecc-sector-size = <512>; 46*4882a593Smuzhiyun nand-on-flash-bbt; 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun at91bootstrap@0 { 50*4882a593Smuzhiyun label = "at91bootstrap"; 51*4882a593Smuzhiyun reg = <0x0 0x40000>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun uboot@40000 { 55*4882a593Smuzhiyun label = "u-boot"; 56*4882a593Smuzhiyun reg = <0x40000 0x80000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun ubootenv@c0000 { 60*4882a593Smuzhiyun label = "U-Boot Env"; 61*4882a593Smuzhiyun reg = <0xc0000 0x140000>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun kernel@200000 { 65*4882a593Smuzhiyun label = "kernel"; 66*4882a593Smuzhiyun reg = <0x200000 0x600000>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun rootfs@800000 { 70*4882a593Smuzhiyun label = "rootfs"; 71*4882a593Smuzhiyun reg = <0x800000 0x1f800000>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun leds { 77*4882a593Smuzhiyun compatible = "gpio-leds"; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun pb18 { 80*4882a593Smuzhiyun label = "pb18"; 81*4882a593Smuzhiyun gpios = <&pioB 18 GPIO_ACTIVE_LOW>; 82*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun pd21 { 86*4882a593Smuzhiyun label = "pd21"; 87*4882a593Smuzhiyun gpios = <&pioD 21 GPIO_ACTIVE_HIGH>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun 1wire_cm { 92*4882a593Smuzhiyun compatible = "w1-gpio"; 93*4882a593Smuzhiyun gpios = <&pioB 18 GPIO_ACTIVE_HIGH>; 94*4882a593Smuzhiyun linux,open-drain; 95*4882a593Smuzhiyun pinctrl-names = "default"; 96*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_1wire_cm>; 97*4882a593Smuzhiyun status = "okay"; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun}; 101