xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/at91sam9g45-gurnard.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Licensed under GPLv2.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "at91sam9g45.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Bluewater Systems Gurnard";
13*4882a593Smuzhiyun	compatible = "atmel,at91sam9g45", "atmel,at91sam9";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
17*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory {
21*4882a593Smuzhiyun		reg = <0x20000000 0x8000000>;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	clocks {
25*4882a593Smuzhiyun		slow_xtal {
26*4882a593Smuzhiyun			clock-frequency = <32768>;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		main_xtal {
30*4882a593Smuzhiyun			clock-frequency = <18432000>;
31*4882a593Smuzhiyun		};
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	ahb {
35*4882a593Smuzhiyun		u-boot,dm-pre-reloc;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun		fb@0x00500000 {
38*4882a593Smuzhiyun			u-boot,dm-pre-reloc;
39*4882a593Smuzhiyun			status = "okay";
40*4882a593Smuzhiyun			display-timings {
41*4882a593Smuzhiyun				rev1 {
42*4882a593Smuzhiyun					clock-frequency = <4166666>;
43*4882a593Smuzhiyun					hactive = <480>;
44*4882a593Smuzhiyun					vactive = <272>;
45*4882a593Smuzhiyun					hfront-porch = <1>;
46*4882a593Smuzhiyun					hback-porch = <1>;
47*4882a593Smuzhiyun					hsync-len = <1>;
48*4882a593Smuzhiyun					vback-porch = <4>;
49*4882a593Smuzhiyun					vfront-porch = <2>;
50*4882a593Smuzhiyun					vsync-len = <1>;
51*4882a593Smuzhiyun					hsync-active = <0>;
52*4882a593Smuzhiyun					vsync-active = <0>;
53*4882a593Smuzhiyun				};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun				rev2 {
56*4882a593Smuzhiyun					clock-frequency = <4166666>;
57*4882a593Smuzhiyun					hactive = <480>;
58*4882a593Smuzhiyun					vactive = <272>;
59*4882a593Smuzhiyun					hfront-porch = <2>;
60*4882a593Smuzhiyun					hback-porch = <2>;
61*4882a593Smuzhiyun					hsync-len = <10>;
62*4882a593Smuzhiyun					vback-porch = <2>;
63*4882a593Smuzhiyun					vfront-porch = <2>;
64*4882a593Smuzhiyun					vsync-len = <10>;
65*4882a593Smuzhiyun					hsync-active = <0>;
66*4882a593Smuzhiyun					vsync-active = <0>;
67*4882a593Smuzhiyun				};
68*4882a593Smuzhiyun			};
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		apb {
72*4882a593Smuzhiyun			pinctrl@fffff400 {
73*4882a593Smuzhiyun				board {
74*4882a593Smuzhiyun					pinctrl_pck0_as_mck: pck0_as_mck {
75*4882a593Smuzhiyun						atmel,pins =
76*4882a593Smuzhiyun							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC1 periph B */
77*4882a593Smuzhiyun					};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun				};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun				mmc0_slot1 {
82*4882a593Smuzhiyun					pinctrl_board_mmc0_slot1: mmc0_slot1-board {
83*4882a593Smuzhiyun						atmel,pins =
84*4882a593Smuzhiyun							<AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PC9 gpio CD pin pull up and deglitch */
85*4882a593Smuzhiyun					};
86*4882a593Smuzhiyun				};
87*4882a593Smuzhiyun			};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun			dbgu: serial@ffffee00 {
90*4882a593Smuzhiyun				status = "okay";
91*4882a593Smuzhiyun			};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun			macb0: ethernet@fffbc000 {
94*4882a593Smuzhiyun				phy-mode = "rmii";
95*4882a593Smuzhiyun				status = "okay";
96*4882a593Smuzhiyun			};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun			mmc0: mmc@fff80000 {
99*4882a593Smuzhiyun				pinctrl-0 = <
100*4882a593Smuzhiyun					&pinctrl_board_mmc0_slot1
101*4882a593Smuzhiyun					&pinctrl_mmc0_slot0_clk_cmd_dat0
102*4882a593Smuzhiyun					&pinctrl_mmc0_slot0_dat1_3>;
103*4882a593Smuzhiyun				status = "okay";
104*4882a593Smuzhiyun				slot@1 {
105*4882a593Smuzhiyun					reg = <1>;
106*4882a593Smuzhiyun					bus-width = <4>;
107*4882a593Smuzhiyun					cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
108*4882a593Smuzhiyun				};
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun			ssc0: ssc@fff9c000 {
112*4882a593Smuzhiyun				status = "okay";
113*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_ssc0_tx>;
114*4882a593Smuzhiyun			};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun			spi0: spi@fffa4000 {
117*4882a593Smuzhiyun				cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
118*4882a593Smuzhiyun				mtd_dataflash@0 {
119*4882a593Smuzhiyun					compatible = "atmel,at45", "atmel,dataflash";
120*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
121*4882a593Smuzhiyun					reg = <1>;
122*4882a593Smuzhiyun				};
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			shdwc@fffffd10 {
126*4882a593Smuzhiyun				atmel,wakeup-counter = <10>;
127*4882a593Smuzhiyun				atmel,wakeup-rtt-timer;
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun			rtc@fffffd20 {
131*4882a593Smuzhiyun				atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
132*4882a593Smuzhiyun				status = "okay";
133*4882a593Smuzhiyun			};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun			watchdog@fffffd40 {
136*4882a593Smuzhiyun				status = "okay";
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun			gpbr: syscon@fffffd60 {
140*4882a593Smuzhiyun				status = "okay";
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun		};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun		nand0: nand@40000000 {
145*4882a593Smuzhiyun			nand-bus-width = <8>;
146*4882a593Smuzhiyun			nand-ecc-mode = "hardware";
147*4882a593Smuzhiyun			nand-on-flash-bbt;
148*4882a593Smuzhiyun			status = "okay";
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		usb1: ehci@00800000 {
152*4882a593Smuzhiyun			atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
153*4882a593Smuzhiyun			status = "okay";
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun};
158