1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2012 Atmel, 5*4882a593Smuzhiyun * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Licensed under GPLv2 or later. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun#include "at91sam9g25.dtsi" 11*4882a593Smuzhiyun#include "at91sam9x5ek.dtsi" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun model = "Atmel AT91SAM9G25-EK"; 15*4882a593Smuzhiyun compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9"; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun ahb { 18*4882a593Smuzhiyun apb { 19*4882a593Smuzhiyun spi0: spi@f0000000 { 20*4882a593Smuzhiyun status = "disabled"; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun mmc1: mmc@f000c000 { 24*4882a593Smuzhiyun status = "disabled"; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun i2c0: i2c@f8010000 { 28*4882a593Smuzhiyun ov2640: camera@0x30 { 29*4882a593Smuzhiyun compatible = "ovti,ov2640"; 30*4882a593Smuzhiyun reg = <0x30>; 31*4882a593Smuzhiyun pinctrl-names = "default"; 32*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; 33*4882a593Smuzhiyun resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>; 34*4882a593Smuzhiyun pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>; 35*4882a593Smuzhiyun clocks = <&pck0>; 36*4882a593Smuzhiyun clock-names = "xvclk"; 37*4882a593Smuzhiyun assigned-clocks = <&pck0>; 38*4882a593Smuzhiyun assigned-clock-rates = <25000000>; 39*4882a593Smuzhiyun status = "okay"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun port { 42*4882a593Smuzhiyun ov2640_0: endpoint { 43*4882a593Smuzhiyun remote-endpoint = <&isi_0>; 44*4882a593Smuzhiyun bus-width = <8>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun macb0: ethernet@f802c000 { 51*4882a593Smuzhiyun phy-mode = "rmii"; 52*4882a593Smuzhiyun status = "okay"; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun isi: isi@f8048000 { 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun port { 58*4882a593Smuzhiyun isi_0: endpoint@0 { 59*4882a593Smuzhiyun reg = <0>; 60*4882a593Smuzhiyun remote-endpoint = <&ov2640_0>; 61*4882a593Smuzhiyun bus-width = <8>; 62*4882a593Smuzhiyun vsync-active = <1>; 63*4882a593Smuzhiyun hsync-active = <1>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun}; 70